enable docker ppp

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2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/drivers/clk/clk-mux.c
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@@ -1,11 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0
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 /*
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  * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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  * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
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  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  *
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  * Simple multiplexer clock implementation
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  */
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@@ -25,6 +22,22 @@
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  * rate - rate is only affected by parent switching.  No clk_set_rate support
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  * parent - parent is adjustable through clk_set_parent
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  */
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+
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+static inline u32 clk_mux_readl(struct clk_mux *mux)
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+{
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+	if (mux->flags & CLK_MUX_BIG_ENDIAN)
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+		return ioread32be(mux->reg);
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+
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+	return readl(mux->reg);
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+}
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+
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+static inline void clk_mux_writel(struct clk_mux *mux, u32 val)
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+{
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+	if (mux->flags & CLK_MUX_BIG_ENDIAN)
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+		iowrite32be(val, mux->reg);
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+	else
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+		writel(val, mux->reg);
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+}
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 int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
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 			 unsigned int val)
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@@ -76,7 +89,7 @@
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 	struct clk_mux *mux = to_clk_mux(hw);
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 	u32 val;
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-	val = clk_readl(mux->reg) >> mux->shift;
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+	val = clk_mux_readl(mux) >> mux->shift;
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 	val &= mux->mask;
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 	return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
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@@ -97,12 +110,12 @@
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 	if (mux->flags & CLK_MUX_HIWORD_MASK) {
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 		reg = mux->mask << (mux->shift + 16);
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 	} else {
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-		reg = clk_readl(mux->reg);
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+		reg = clk_mux_readl(mux);
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 		reg &= ~(mux->mask << mux->shift);
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 	}
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 	val = val << mux->shift;
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 	reg |= val;
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-	clk_writel(reg, mux->reg);
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+	clk_mux_writel(mux, reg);
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 	if (mux->lock)
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 		spin_unlock_irqrestore(mux->lock, flags);
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@@ -132,17 +145,19 @@
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 };
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 EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
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147
 
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-struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name,
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-		const char * const *parent_names, u8 num_parents,
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-		unsigned long flags,
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-		void __iomem *reg, u8 shift, u32 mask,
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+struct clk_hw *__clk_hw_register_mux(struct device *dev, struct device_node *np,
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+		const char *name, u8 num_parents,
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+		const char * const *parent_names,
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+		const struct clk_hw **parent_hws,
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+		const struct clk_parent_data *parent_data,
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+		unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
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 		u8 clk_mux_flags, u32 *table, spinlock_t *lock)
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 {
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 	struct clk_mux *mux;
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 	struct clk_hw *hw;
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 	struct clk_init_data init = {};
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 	u8 width = 0;
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-	int ret;
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+	int ret = -EINVAL;
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 	if (clk_mux_flags & CLK_MUX_HIWORD_MASK) {
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 		width = fls(mask) - ffs(mask) + 1;
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@@ -162,8 +177,10 @@
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 		init.ops = &clk_mux_ro_ops;
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 	else
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 		init.ops = &clk_mux_ops;
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-	init.flags = flags | CLK_IS_BASIC;
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+	init.flags = flags;
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 	init.parent_names = parent_names;
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+	init.parent_data = parent_data;
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+	init.parent_hws = parent_hws;
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 	init.num_parents = num_parents;
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 	/* struct clk_mux assignments */
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@@ -176,7 +193,10 @@
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 	mux->hw.init = &init;
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 	hw = &mux->hw;
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-	ret = clk_hw_register(dev, hw);
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+	if (dev || !np)
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+		ret = clk_hw_register(dev, hw);
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+	else if (np)
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+		ret = of_clk_hw_register(np, hw);
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 	if (ret) {
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 		kfree(mux);
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 		hw = ERR_PTR(ret);
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@@ -184,52 +204,23 @@
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 	return hw;
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 }
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-EXPORT_SYMBOL_GPL(clk_hw_register_mux_table);
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+EXPORT_SYMBOL_GPL(__clk_hw_register_mux);
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 struct clk *clk_register_mux_table(struct device *dev, const char *name,
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 		const char * const *parent_names, u8 num_parents,
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-		unsigned long flags,
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-		void __iomem *reg, u8 shift, u32 mask,
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+		unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
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 		u8 clk_mux_flags, u32 *table, spinlock_t *lock)
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 {
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 	struct clk_hw *hw;
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-	hw = clk_hw_register_mux_table(dev, name, parent_names, num_parents,
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-				       flags, reg, shift, mask, clk_mux_flags,
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-				       table, lock);
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+	hw = clk_hw_register_mux_table(dev, name, parent_names,
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+				       num_parents, flags, reg, shift, mask,
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+				       clk_mux_flags, table, lock);
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 	if (IS_ERR(hw))
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 		return ERR_CAST(hw);
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 	return hw->clk;
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 }
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 EXPORT_SYMBOL_GPL(clk_register_mux_table);
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-
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-struct clk *clk_register_mux(struct device *dev, const char *name,
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-		const char * const *parent_names, u8 num_parents,
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-		unsigned long flags,
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-		void __iomem *reg, u8 shift, u8 width,
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-		u8 clk_mux_flags, spinlock_t *lock)
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-{
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-	u32 mask = BIT(width) - 1;
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-
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-	return clk_register_mux_table(dev, name, parent_names, num_parents,
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-				      flags, reg, shift, mask, clk_mux_flags,
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-				      NULL, lock);
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-}
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-EXPORT_SYMBOL_GPL(clk_register_mux);
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-
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-struct clk_hw *clk_hw_register_mux(struct device *dev, const char *name,
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-		const char * const *parent_names, u8 num_parents,
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-		unsigned long flags,
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-		void __iomem *reg, u8 shift, u8 width,
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-		u8 clk_mux_flags, spinlock_t *lock)
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-{
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-	u32 mask = BIT(width) - 1;
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-
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-	return clk_hw_register_mux_table(dev, name, parent_names, num_parents,
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-				      flags, reg, shift, mask, clk_mux_flags,
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-				      NULL, lock);
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-}
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-EXPORT_SYMBOL_GPL(clk_hw_register_mux);
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 void clk_unregister_mux(struct clk *clk)
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 {