enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/drivers/clk/clk-asm9260.c
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@@ -1,17 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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- *
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- * You should have received a copy of the GNU General Public License along with
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- * this program.  If not, see <http://www.gnu.org/licenses/>.
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  */
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 #include <linux/clk.h>
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@@ -271,7 +260,6 @@
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 	const char *ref_clk, *pll_clk = "pll";
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 	u32 rate;
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 	int n;
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-	u32 accuracy = 0;
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 	clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL);
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 	if (!clk_data)
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@@ -281,18 +269,19 @@
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 	base = of_io_request_and_map(np, 0, np->name);
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 	if (IS_ERR(base))
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-		panic("%s: unable to map resource", np->name);
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+		panic("%pOFn: unable to map resource", np);
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 	/* register pll */
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 	rate = (ioread32(base + HW_SYSPLLCTRL) & 0xffff) * 1000000;
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+	/* TODO: Convert to DT parent scheme */
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 	ref_clk = of_clk_get_parent_name(np, 0);
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-	accuracy = clk_get_accuracy(__clk_lookup(ref_clk));
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-	hw = clk_hw_register_fixed_rate_with_accuracy(NULL, pll_clk,
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-			ref_clk, 0, rate, accuracy);
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+	hw = __clk_hw_register_fixed_rate(NULL, NULL, pll_clk,
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+			ref_clk, NULL, NULL, 0, rate, 0,
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+			CLK_FIXED_RATE_PARENT_ACCURACY);
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 	if (IS_ERR(hw))
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-		panic("%s: can't register REFCLK. Check DT!", np->name);
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+		panic("%pOFn: can't register REFCLK. Check DT!", np);
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 	for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) {
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 		const struct asm9260_mux_clock *mc = &asm9260_mux_clks[n];