enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/drivers/clk/at91/clk-plldiv.c
..
..
@@ -1,11 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
1
2
 /*
2
3
  *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License as published by
6
- * the Free Software Foundation; either version 2 of the License, or
7
- * (at your option) any later version.
8
- *
9
4
  */
10
5
 
11
6
 #include <linux/clk-provider.h>
..
..
@@ -75,13 +70,13 @@
75
70
 	.set_rate = clk_plldiv_set_rate,
76
71
 };
77
72
 
78
-static struct clk_hw * __init
73
+struct clk_hw * __init
79
74
 at91_clk_register_plldiv(struct regmap *regmap, const char *name,
80
75
 			 const char *parent_name)
81
76
 {
82
77
 	struct clk_plldiv *plldiv;
83
78
 	struct clk_hw *hw;
84
-	struct clk_init_data init = {};
79
+	struct clk_init_data init;
85
80
 	int ret;
86
81
 
87
82
 	plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
..
..
@@ -106,28 +101,3 @@
106
101
 
107
102
 	return hw;
108
103
 }
109
-
110
-static void __init
111
-of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
112
-{
113
-	struct clk_hw *hw;
114
-	const char *parent_name;
115
-	const char *name = np->name;
116
-	struct regmap *regmap;
117
-
118
-	parent_name = of_clk_get_parent_name(np, 0);
119
-
120
-	of_property_read_string(np, "clock-output-names", &name);
121
-
122
-	regmap = syscon_node_to_regmap(of_get_parent(np));
123
-	if (IS_ERR(regmap))
124
-		return;
125
-
126
-	hw = at91_clk_register_plldiv(regmap, name, parent_name);
127
-	if (IS_ERR(hw))
128
-		return;
129
-
130
-	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
131
-}
132
-CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
133
-	       of_at91sam9x5_clk_plldiv_setup);