enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/drivers/char/hw_random/imx-rngc.c
..
..
@@ -1,15 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
1
2
 /*
2
3
  * RNG driver for Freescale RNGC
3
4
  *
4
5
  * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
5
6
  * Copyright (C) 2017 Martin Kaiser <martin@kaiser.cx>
6
- *
7
- * The code contained herein is licensed under the GNU General Public
8
- * License. You may obtain a copy of the GNU General Public License
9
- * Version 2 or later at the following locations:
10
- *
11
- * http://www.opensource.org/licenses/gpl-license.html
12
- * http://www.gnu.org/copyleft/gpl.html
13
7
  */
14
8
 
15
9
 #include <linux/module.h>
..
..
@@ -24,11 +18,21 @@
24
18
 #include <linux/completion.h>
25
19
 #include <linux/io.h>
26
20
 
21
+#define RNGC_VER_ID			0x0000
27
22
 #define RNGC_COMMAND			0x0004
28
23
 #define RNGC_CONTROL			0x0008
29
24
 #define RNGC_STATUS			0x000C
30
25
 #define RNGC_ERROR			0x0010
31
26
 #define RNGC_FIFO			0x0014
27
+
28
+/* the fields in the ver id register */
29
+#define RNGC_TYPE_SHIFT		28
30
+#define RNGC_VER_MAJ_SHIFT		8
31
+
32
+/* the rng_type field */
33
+#define RNGC_TYPE_RNGB			0x1
34
+#define RNGC_TYPE_RNGC			0x2
35
+
32
36
 
33
37
 #define RNGC_CMD_CLR_ERR		0x00000020
34
38
 #define RNGC_CMD_CLR_INT		0x00000010
..
..
@@ -37,6 +41,7 @@
37
41
 
38
42
 #define RNGC_CTRL_MASK_ERROR		0x00000040
39
43
 #define RNGC_CTRL_MASK_DONE		0x00000020
44
+#define RNGC_CTRL_AUTO_SEED		0x00000010
40
45
 
41
46
 #define RNGC_STATUS_ERROR		0x00010000
42
47
 #define RNGC_STATUS_FIFO_LEVEL_MASK	0x00000f00
..
..
@@ -106,17 +111,11 @@
106
111
 	writel(cmd | RNGC_CMD_SELF_TEST, rngc->base + RNGC_COMMAND);
107
112
 
108
113
 	ret = wait_for_completion_timeout(&rngc->rng_op_done, RNGC_TIMEOUT);
109
-	if (!ret) {
110
-		imx_rngc_irq_mask_clear(rngc);
114
+	imx_rngc_irq_mask_clear(rngc);
115
+	if (!ret)
111
116
 		return -ETIMEDOUT;
112
-	}
113
117
 
114
-	if (rngc->err_reg != 0) {
115
-		imx_rngc_irq_mask_clear(rngc);
116
-		return -EIO;
117
-	}
118
-
119
-	return 0;
118
+	return rngc->err_reg ? -EIO : 0;
120
119
 }
121
120
 
122
121
 static int imx_rngc_read(struct hwrng *rng, void *data, size_t max, bool wait)
..
..
@@ -173,17 +172,17 @@
173
172
 static int imx_rngc_init(struct hwrng *rng)
174
173
 {
175
174
 	struct imx_rngc *rngc = container_of(rng, struct imx_rngc, rng);
176
-	u32 cmd;
175
+	u32 cmd, ctrl;
177
176
 	int ret;
178
177
 
179
178
 	/* clear error */
180
179
 	cmd = readl(rngc->base + RNGC_COMMAND);
181
180
 	writel(cmd | RNGC_CMD_CLR_ERR, rngc->base + RNGC_COMMAND);
182
181
 
182
+	imx_rngc_irq_unmask(rngc);
183
+
183
184
 	/* create seed, repeat while there is some statistical error */
184
185
 	do {
185
-		imx_rngc_irq_unmask(rngc);
186
-
187
186
 		/* seed creation */
188
187
 		cmd = readl(rngc->base + RNGC_COMMAND);
189
188
 		writel(cmd | RNGC_CMD_SEED, rngc->base + RNGC_COMMAND);
..
..
@@ -192,28 +191,57 @@
192
191
 				RNGC_TIMEOUT);
193
192
 
194
193
 		if (!ret) {
195
-			imx_rngc_irq_mask_clear(rngc);
196
-			return -ETIMEDOUT;
194
+			ret = -ETIMEDOUT;
195
+			goto err;
197
196
 		}
198
197
 
199
198
 	} while (rngc->err_reg == RNGC_ERROR_STATUS_STAT_ERR);
200
199
 
201
-	return rngc->err_reg ? -EIO : 0;
200
+	if (rngc->err_reg) {
201
+		ret = -EIO;
202
+		goto err;
203
+	}
204
+
205
+	/*
206
+	 * enable automatic seeding, the rngc creates a new seed automatically
207
+	 * after serving 2^20 random 160-bit words
208
+	 */
209
+	ctrl = readl(rngc->base + RNGC_CONTROL);
210
+	ctrl |= RNGC_CTRL_AUTO_SEED;
211
+	writel(ctrl, rngc->base + RNGC_CONTROL);
212
+
213
+	/*
214
+	 * if initialisation was successful, we keep the interrupt
215
+	 * unmasked until imx_rngc_cleanup is called
216
+	 * we mask the interrupt ourselves if we return an error
217
+	 */
218
+	return 0;
219
+
220
+err:
221
+	imx_rngc_irq_mask_clear(rngc);
222
+	return ret;
223
+}
224
+
225
+static void imx_rngc_cleanup(struct hwrng *rng)
226
+{
227
+	struct imx_rngc *rngc = container_of(rng, struct imx_rngc, rng);
228
+
229
+	imx_rngc_irq_mask_clear(rngc);
202
230
 }
203
231
 
204
232
 static int imx_rngc_probe(struct platform_device *pdev)
205
233
 {
206
234
 	struct imx_rngc *rngc;
207
-	struct resource *res;
208
235
 	int ret;
209
236
 	int irq;
237
+	u32 ver_id;
238
+	u8  rng_type;
210
239
 
211
240
 	rngc = devm_kzalloc(&pdev->dev, sizeof(*rngc), GFP_KERNEL);
212
241
 	if (!rngc)
213
242
 		return -ENOMEM;
214
243
 
215
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
216
-	rngc->base = devm_ioremap_resource(&pdev->dev, res);
244
+	rngc->base = devm_platform_ioremap_resource(pdev, 0);
217
245
 	if (IS_ERR(rngc->base))
218
246
 		return PTR_ERR(rngc->base);
219
247
 
..
..
@@ -233,10 +261,14 @@
233
261
 	if (ret)
234
262
 		return ret;
235
263
 
236
-	ret = devm_request_irq(&pdev->dev,
237
-			irq, imx_rngc_irq, 0, pdev->name, (void *)rngc);
238
-	if (ret) {
239
-		dev_err(rngc->dev, "Can't get interrupt working.\n");
264
+	ver_id = readl(rngc->base + RNGC_VER_ID);
265
+	rng_type = ver_id >> RNGC_TYPE_SHIFT;
266
+	/*
267
+	 * This driver supports only RNGC and RNGB. (There's a different
268
+	 * driver for RNGA.)
269
+	 */
270
+	if (rng_type != RNGC_TYPE_RNGC && rng_type != RNGC_TYPE_RNGB) {
271
+		ret = -ENODEV;
240
272
 		goto err;
241
273
 	}
242
274
 
..
..
@@ -245,27 +277,39 @@
245
277
 	rngc->rng.name = pdev->name;
246
278
 	rngc->rng.init = imx_rngc_init;
247
279
 	rngc->rng.read = imx_rngc_read;
280
+	rngc->rng.cleanup = imx_rngc_cleanup;
281
+	rngc->rng.quality = 19;
248
282
 
249
283
 	rngc->dev = &pdev->dev;
250
284
 	platform_set_drvdata(pdev, rngc);
251
285
 
252
286
 	imx_rngc_irq_mask_clear(rngc);
253
287
 
288
+	ret = devm_request_irq(&pdev->dev,
289
+			irq, imx_rngc_irq, 0, pdev->name, (void *)rngc);
290
+	if (ret) {
291
+		dev_err(rngc->dev, "Can't get interrupt working.\n");
292
+		return ret;
293
+	}
294
+
254
295
 	if (self_test) {
255
296
 		ret = imx_rngc_self_test(rngc);
256
297
 		if (ret) {
257
-			dev_err(rngc->dev, "FSL RNGC self test failed.\n");
298
+			dev_err(rngc->dev, "self test failed\n");
258
299
 			goto err;
259
300
 		}
260
301
 	}
261
302
 
262
303
 	ret = hwrng_register(&rngc->rng);
263
304
 	if (ret) {
264
-		dev_err(&pdev->dev, "FSL RNGC registering failed (%d)\n", ret);
305
+		dev_err(&pdev->dev, "hwrng registration failed\n");
265
306
 		goto err;
266
307
 	}
267
308
 
268
-	dev_info(&pdev->dev, "Freescale RNGC registered.\n");
309
+	dev_info(&pdev->dev,
310
+		"Freescale RNG%c registered (HW revision %d.%02d)\n",
311
+		rng_type == RNGC_TYPE_RNGB ? 'B' : 'C',
312
+		(ver_id >> RNGC_VER_MAJ_SHIFT) & 0xff, ver_id & 0xff);
269
313
 	return 0;
270
314
 
271
315
 err: