enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/arch/x86/hyperv/hv_apic.c
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@@ -20,7 +20,6 @@
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  */
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 #include <linux/types.h>
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-#include <linux/version.h>
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 #include <linux/vmalloc.h>
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 #include <linux/mm.h>
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 #include <linux/clockchips.h>
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@@ -87,6 +86,11 @@
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 static void hv_apic_eoi_write(u32 reg, u32 val)
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 {
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+	struct hv_vp_assist_page *hvp = hv_vp_assist_page[smp_processor_id()];
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+
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+	if (hvp && (xchg(&hvp->apic_assist, 0) & 0x1))
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+		return;
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+
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 	wrmsr(HV_X64_MSR_EOI, val, 0);
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 }
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@@ -190,10 +194,20 @@
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 static bool __send_ipi_one(int cpu, int vector)
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 {
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-	struct cpumask mask = CPU_MASK_NONE;
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+	int vp = hv_cpu_number_to_vp_number(cpu);
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-	cpumask_set_cpu(cpu, &mask);
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-	return __send_ipi_mask(&mask, vector);
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+	trace_hyperv_send_ipi_one(cpu, vector);
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+
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+	if (!hv_hypercall_pg || (vp == VP_INVAL))
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+		return false;
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+
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+	if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR))
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+		return false;
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+
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+	if (vp >= 64)
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+		return __send_ipi_mask_ex(cpumask_of(cpu), vector);
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+
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+	return !hv_do_fast_hypercall16(HVCALL_SEND_IPI, vector, BIT_ULL(vp));
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 }
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 static void hv_send_ipi(int cpu, int vector)
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@@ -256,11 +270,25 @@
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 	}
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 	if (ms_hyperv.hints & HV_X64_APIC_ACCESS_RECOMMENDED) {
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-		pr_info("Hyper-V: Using MSR based APIC access\n");
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+		pr_info("Hyper-V: Using enlightened APIC (%s mode)",
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+			x2apic_enabled() ? "x2apic" : "xapic");
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+		/*
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+		 * When in x2apic mode, don't use the Hyper-V specific APIC
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+		 * accessors since the field layout in the ICR register is
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+		 * different in x2apic mode. Furthermore, the architectural
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+		 * x2apic MSRs function just as well as the Hyper-V
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+		 * synthetic APIC MSRs, so there's no benefit in having
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+		 * separate Hyper-V accessors for x2apic mode. The only
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+		 * exception is hv_apic_eoi_write, because it benefits from
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+		 * lazy EOI when available, but the same accessor works for
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+		 * both xapic and x2apic because the field layout is the same.
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+		 */
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 		apic_set_eoi_write(hv_apic_eoi_write);
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-		apic->read      = hv_apic_read;
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-		apic->write     = hv_apic_write;
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-		apic->icr_write = hv_apic_icr_write;
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-		apic->icr_read  = hv_apic_icr_read;
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+		if (!x2apic_enabled()) {
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+			apic->read      = hv_apic_read;
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+			apic->write     = hv_apic_write;
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+			apic->icr_write = hv_apic_icr_write;
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+			apic->icr_read  = hv_apic_icr_read;
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+		}
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 	}
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 }