| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) |
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| 3 | 4 | * |
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| 4 | 5 | * Modifications for ppc64: |
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| 5 | 6 | * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> |
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| 6 | | - * |
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| 7 | | - * This program is free software; you can redistribute it and/or |
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| 8 | | - * modify it under the terms of the GNU General Public License |
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| 9 | | - * as published by the Free Software Foundation; either version |
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| 10 | | - * 2 of the License, or (at your option) any later version. |
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| 11 | 7 | */ |
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| 12 | 8 | |
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| 13 | 9 | #include <linux/string.h> |
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| .. | .. |
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| 20 | 16 | #include <asm/oprofile_impl.h> |
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| 21 | 17 | #include <asm/cputable.h> |
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| 22 | 18 | #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ |
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| 19 | +#include <asm/mce.h> |
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| 23 | 20 | #include <asm/mmu.h> |
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| 24 | 21 | #include <asm/setup.h> |
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| 25 | 22 | |
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| .. | .. |
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| 63 | 60 | extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); |
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| 64 | 61 | #endif /* CONFIG_PPC32 */ |
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| 65 | 62 | #ifdef CONFIG_PPC64 |
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| 63 | +#include <asm/cpu_setup_power.h> |
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| 66 | 64 | extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); |
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| 67 | 65 | extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); |
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| 68 | 66 | extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); |
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| 69 | 67 | extern void __restore_cpu_pa6t(void); |
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| 70 | 68 | extern void __restore_cpu_ppc970(void); |
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| 71 | | -extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); |
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| 72 | | -extern void __restore_cpu_power7(void); |
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| 73 | | -extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); |
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| 74 | | -extern void __restore_cpu_power8(void); |
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| 75 | | -extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); |
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| 76 | | -extern void __restore_cpu_power9(void); |
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| 77 | 69 | extern long __machine_check_early_realmode_p7(struct pt_regs *regs); |
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| 78 | 70 | extern long __machine_check_early_realmode_p8(struct pt_regs *regs); |
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| 79 | 71 | extern long __machine_check_early_realmode_p9(struct pt_regs *regs); |
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| .. | .. |
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| 122 | 114 | #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ |
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| 123 | 115 | PPC_FEATURE2_ARCH_3_00 | \ |
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| 124 | 116 | PPC_FEATURE2_HAS_IEEE128 | \ |
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| 125 | | - PPC_FEATURE2_DARN ) |
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| 117 | + PPC_FEATURE2_DARN | \ |
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| 118 | + PPC_FEATURE2_SCV) |
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| 119 | +#define COMMON_USER_POWER10 COMMON_USER_POWER9 |
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| 120 | +#define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ |
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| 121 | + PPC_FEATURE2_MMA | \ |
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| 122 | + PPC_FEATURE2_ARCH_3_00 | \ |
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| 123 | + PPC_FEATURE2_HAS_IEEE128 | \ |
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| 124 | + PPC_FEATURE2_DARN | \ |
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| 125 | + PPC_FEATURE2_SCV | \ |
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| 126 | + PPC_FEATURE2_ARCH_2_07 | \ |
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| 127 | + PPC_FEATURE2_DSCR | \ |
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| 128 | + PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ |
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| 129 | + PPC_FEATURE2_VEC_CRYPTO) |
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| 126 | 130 | |
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| 127 | 131 | #ifdef CONFIG_PPC_BOOK3E_64 |
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| 128 | 132 | #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) |
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| .. | .. |
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| 371 | 375 | .cpu_restore = __restore_cpu_power9, |
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| 372 | 376 | .platform = "power9", |
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| 373 | 377 | }, |
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| 378 | + { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ |
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| 379 | + .pvr_mask = 0xffffffff, |
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| 380 | + .pvr_value = 0x0f000006, |
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| 381 | + .cpu_name = "POWER10 (architected)", |
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| 382 | + .cpu_features = CPU_FTRS_POWER10, |
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| 383 | + .cpu_user_features = COMMON_USER_POWER10, |
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| 384 | + .cpu_user_features2 = COMMON_USER2_POWER10, |
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| 385 | + .mmu_features = MMU_FTRS_POWER10, |
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| 386 | + .icache_bsize = 128, |
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| 387 | + .dcache_bsize = 128, |
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| 388 | + .oprofile_type = PPC_OPROFILE_INVALID, |
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| 389 | + .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
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| 390 | + .cpu_setup = __setup_cpu_power10, |
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| 391 | + .cpu_restore = __restore_cpu_power10, |
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| 392 | + .platform = "power10", |
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| 393 | + }, |
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| 374 | 394 | { /* Power7 */ |
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| 375 | 395 | .pvr_mask = 0xffff0000, |
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| 376 | 396 | .pvr_value = 0x003f0000, |
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| .. | .. |
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| 523 | 543 | .machine_check_early = __machine_check_early_realmode_p9, |
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| 524 | 544 | .platform = "power9", |
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| 525 | 545 | }, |
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| 546 | + { /* Power10 */ |
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| 547 | + .pvr_mask = 0xffff0000, |
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| 548 | + .pvr_value = 0x00800000, |
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| 549 | + .cpu_name = "POWER10 (raw)", |
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| 550 | + .cpu_features = CPU_FTRS_POWER10, |
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| 551 | + .cpu_user_features = COMMON_USER_POWER10, |
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| 552 | + .cpu_user_features2 = COMMON_USER2_POWER10, |
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| 553 | + .mmu_features = MMU_FTRS_POWER10, |
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| 554 | + .icache_bsize = 128, |
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| 555 | + .dcache_bsize = 128, |
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| 556 | + .num_pmcs = 6, |
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| 557 | + .pmc_type = PPC_PMC_IBM, |
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| 558 | + .oprofile_cpu_type = "ppc64/power10", |
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| 559 | + .oprofile_type = PPC_OPROFILE_INVALID, |
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| 560 | + .cpu_setup = __setup_cpu_power10, |
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| 561 | + .cpu_restore = __restore_cpu_power10, |
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| 562 | + .machine_check_early = __machine_check_early_realmode_p10, |
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| 563 | + .platform = "power10", |
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| 564 | + }, |
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| 526 | 565 | { /* Cell Broadband Engine */ |
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| 527 | 566 | .pvr_mask = 0xffff0000, |
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| 528 | 567 | .pvr_value = 0x00700000, |
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| .. | .. |
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| 573 | 612 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
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| 574 | 613 | |
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| 575 | 614 | #ifdef CONFIG_PPC32 |
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| 576 | | -#ifdef CONFIG_PPC_BOOK3S_32 |
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| 577 | | - { /* 601 */ |
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| 578 | | - .pvr_mask = 0xffff0000, |
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| 579 | | - .pvr_value = 0x00010000, |
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| 580 | | - .cpu_name = "601", |
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| 581 | | - .cpu_features = CPU_FTRS_PPC601, |
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| 582 | | - .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | |
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| 583 | | - PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, |
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| 584 | | - .mmu_features = MMU_FTR_HPTE_TABLE, |
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| 585 | | - .icache_bsize = 32, |
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| 586 | | - .dcache_bsize = 32, |
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| 587 | | - .machine_check = machine_check_generic, |
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| 588 | | - .platform = "ppc601", |
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| 589 | | - }, |
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| 615 | +#ifdef CONFIG_PPC_BOOK3S_6xx |
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| 590 | 616 | { /* 603 */ |
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| 591 | 617 | .pvr_mask = 0xffff0000, |
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| 592 | 618 | .pvr_value = 0x00030000, |
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| .. | .. |
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| 1216 | 1242 | .machine_check = machine_check_generic, |
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| 1217 | 1243 | .platform = "ppc603", |
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| 1218 | 1244 | }, |
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| 1219 | | -#endif /* CONFIG_PPC_BOOK3S_32 */ |
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| 1245 | +#endif /* CONFIG_PPC_BOOK3S_6xx */ |
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| 1220 | 1246 | #ifdef CONFIG_PPC_8xx |
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| 1221 | 1247 | { /* 8xx */ |
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| 1222 | 1248 | .pvr_mask = 0xffff0000, |
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| .. | .. |
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| 1234 | 1260 | }, |
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| 1235 | 1261 | #endif /* CONFIG_PPC_8xx */ |
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| 1236 | 1262 | #ifdef CONFIG_40x |
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| 1237 | | - { /* 403GC */ |
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| 1238 | | - .pvr_mask = 0xffffff00, |
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| 1239 | | - .pvr_value = 0x00200200, |
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| 1240 | | - .cpu_name = "403GC", |
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| 1241 | | - .cpu_features = CPU_FTRS_40X, |
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| 1242 | | - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
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| 1243 | | - .mmu_features = MMU_FTR_TYPE_40x, |
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| 1244 | | - .icache_bsize = 16, |
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| 1245 | | - .dcache_bsize = 16, |
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| 1246 | | - .machine_check = machine_check_4xx, |
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| 1247 | | - .platform = "ppc403", |
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| 1248 | | - }, |
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| 1249 | | - { /* 403GCX */ |
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| 1250 | | - .pvr_mask = 0xffffff00, |
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| 1251 | | - .pvr_value = 0x00201400, |
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| 1252 | | - .cpu_name = "403GCX", |
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| 1253 | | - .cpu_features = CPU_FTRS_40X, |
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| 1254 | | - .cpu_user_features = PPC_FEATURE_32 | |
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| 1255 | | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, |
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| 1256 | | - .mmu_features = MMU_FTR_TYPE_40x, |
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| 1257 | | - .icache_bsize = 16, |
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| 1258 | | - .dcache_bsize = 16, |
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| 1259 | | - .machine_check = machine_check_4xx, |
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| 1260 | | - .platform = "ppc403", |
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| 1261 | | - }, |
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| 1262 | | - { /* 403G ?? */ |
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| 1263 | | - .pvr_mask = 0xffff0000, |
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| 1264 | | - .pvr_value = 0x00200000, |
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| 1265 | | - .cpu_name = "403G ??", |
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| 1266 | | - .cpu_features = CPU_FTRS_40X, |
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| 1267 | | - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
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| 1268 | | - .mmu_features = MMU_FTR_TYPE_40x, |
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| 1269 | | - .icache_bsize = 16, |
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| 1270 | | - .dcache_bsize = 16, |
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| 1271 | | - .machine_check = machine_check_4xx, |
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| 1272 | | - .platform = "ppc403", |
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| 1273 | | - }, |
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| 1274 | | - { /* 405GP */ |
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| 1275 | | - .pvr_mask = 0xffff0000, |
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| 1276 | | - .pvr_value = 0x40110000, |
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| 1277 | | - .cpu_name = "405GP", |
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| 1278 | | - .cpu_features = CPU_FTRS_40X, |
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| 1279 | | - .cpu_user_features = PPC_FEATURE_32 | |
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| 1280 | | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
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| 1281 | | - .mmu_features = MMU_FTR_TYPE_40x, |
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| 1282 | | - .icache_bsize = 32, |
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| 1283 | | - .dcache_bsize = 32, |
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| 1284 | | - .machine_check = machine_check_4xx, |
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| 1285 | | - .platform = "ppc405", |
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| 1286 | | - }, |
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| 1287 | | - { /* STB 03xxx */ |
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| 1288 | | - .pvr_mask = 0xffff0000, |
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| 1289 | | - .pvr_value = 0x40130000, |
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| 1290 | | - .cpu_name = "STB03xxx", |
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| 1291 | | - .cpu_features = CPU_FTRS_40X, |
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| 1292 | | - .cpu_user_features = PPC_FEATURE_32 | |
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| 1293 | | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
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| 1294 | | - .mmu_features = MMU_FTR_TYPE_40x, |
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| 1295 | | - .icache_bsize = 32, |
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| 1296 | | - .dcache_bsize = 32, |
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| 1297 | | - .machine_check = machine_check_4xx, |
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| 1298 | | - .platform = "ppc405", |
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| 1299 | | - }, |
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| 1300 | 1263 | { /* STB 04xxx */ |
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| 1301 | 1264 | .pvr_mask = 0xffff0000, |
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| 1302 | 1265 | .pvr_value = 0x41810000, |
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| .. | .. |
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| 1381 | 1344 | .cpu_name = "405LP", |
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| 1382 | 1345 | .cpu_features = CPU_FTRS_40X, |
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| 1383 | 1346 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
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| 1384 | | - .mmu_features = MMU_FTR_TYPE_40x, |
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| 1385 | | - .icache_bsize = 32, |
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| 1386 | | - .dcache_bsize = 32, |
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| 1387 | | - .machine_check = machine_check_4xx, |
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| 1388 | | - .platform = "ppc405", |
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| 1389 | | - }, |
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| 1390 | | - { /* Xilinx Virtex-II Pro */ |
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| 1391 | | - .pvr_mask = 0xfffff000, |
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| 1392 | | - .pvr_value = 0x20010000, |
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| 1393 | | - .cpu_name = "Virtex-II Pro", |
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| 1394 | | - .cpu_features = CPU_FTRS_40X, |
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| 1395 | | - .cpu_user_features = PPC_FEATURE_32 | |
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| 1396 | | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
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| 1397 | | - .mmu_features = MMU_FTR_TYPE_40x, |
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| 1398 | | - .icache_bsize = 32, |
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| 1399 | | - .dcache_bsize = 32, |
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| 1400 | | - .machine_check = machine_check_4xx, |
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| 1401 | | - .platform = "ppc405", |
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| 1402 | | - }, |
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| 1403 | | - { /* Xilinx Virtex-4 FX */ |
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| 1404 | | - .pvr_mask = 0xfffff000, |
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| 1405 | | - .pvr_value = 0x20011000, |
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| 1406 | | - .cpu_name = "Virtex-4 FX", |
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| 1407 | | - .cpu_features = CPU_FTRS_40X, |
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| 1408 | | - .cpu_user_features = PPC_FEATURE_32 | |
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| 1409 | | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
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| 1410 | 1347 | .mmu_features = MMU_FTR_TYPE_40x, |
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| 1411 | 1348 | .icache_bsize = 32, |
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| 1412 | 1349 | .dcache_bsize = 32, |
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| .. | .. |
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| 1802 | 1739 | .machine_check = machine_check_440A, |
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| 1803 | 1740 | .platform = "ppc440", |
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| 1804 | 1741 | }, |
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| 1805 | | - { /* 440 in Xilinx Virtex-5 FXT */ |
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| 1806 | | - .pvr_mask = 0xfffffff0, |
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| 1807 | | - .pvr_value = 0x7ff21910, |
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| 1808 | | - .cpu_name = "440 in Virtex-5 FXT", |
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| 1809 | | - .cpu_features = CPU_FTRS_44X, |
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| 1810 | | - .cpu_user_features = COMMON_USER_BOOKE, |
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| 1811 | | - .mmu_features = MMU_FTR_TYPE_44x, |
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| 1812 | | - .icache_bsize = 32, |
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| 1813 | | - .dcache_bsize = 32, |
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| 1814 | | - .cpu_setup = __setup_cpu_440x5, |
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| 1815 | | - .machine_check = machine_check_440A, |
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| 1816 | | - .platform = "ppc440", |
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| 1817 | | - }, |
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| 1818 | 1742 | { /* 460EX */ |
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| 1819 | 1743 | .pvr_mask = 0xffff0006, |
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| 1820 | 1744 | .pvr_value = 0x13020002, |
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| .. | .. |
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| 2147 | 2071 | struct cpu_spec *t = &the_cpu_spec; |
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| 2148 | 2072 | |
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| 2149 | 2073 | t = PTRRELOC(t); |
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| 2150 | | - *t = *s; |
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| 2074 | + /* |
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| 2075 | + * use memcpy() instead of *t = *s so that GCC replaces it |
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| 2076 | + * by __memcpy() when KASAN is active |
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| 2077 | + */ |
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| 2078 | + memcpy(t, s, sizeof(*t)); |
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| 2151 | 2079 | |
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| 2152 | 2080 | *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; |
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| 2153 | 2081 | } |
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| .. | .. |
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| 2161 | 2089 | t = PTRRELOC(t); |
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| 2162 | 2090 | old = *t; |
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| 2163 | 2091 | |
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| 2164 | | - /* Copy everything, then do fixups */ |
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| 2165 | | - *t = *s; |
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| 2092 | + /* |
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| 2093 | + * Copy everything, then do fixups. Use memcpy() instead of *t = *s |
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| 2094 | + * so that GCC replaces it by __memcpy() when KASAN is active |
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| 2095 | + */ |
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| 2096 | + memcpy(t, s, sizeof(*t)); |
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| 2166 | 2097 | |
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| 2167 | 2098 | /* |
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| 2168 | 2099 | * If we are overriding a previous value derived from the real |
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| .. | .. |
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| 2193 | 2124 | */ |
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| 2194 | 2125 | if (old.oprofile_cpu_type != NULL) { |
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| 2195 | 2126 | t->oprofile_cpu_type = old.oprofile_cpu_type; |
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| 2196 | | - t->oprofile_type = old.oprofile_type; |
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| 2197 | 2127 | t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; |
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| 2198 | 2128 | } |
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| 2199 | 2129 | } |
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