enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/arch/parisc/include/asm/bitops.h
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@@ -12,21 +12,6 @@
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 #include <asm/barrier.h>
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 #include <linux/atomic.h>
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-/*
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- * HP-PARISC specific bit operations
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- * for a detailed description of the functions please refer
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- * to include/asm-i386/bitops.h or kerneldoc
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- */
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-
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-#if __BITS_PER_LONG == 64
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-#define SHIFT_PER_LONG 6
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-#else
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-#define SHIFT_PER_LONG 5
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-#endif
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-
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-#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1))
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-
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-
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 /* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
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  * on use of volatile and __*_bit() (set/clear/change):
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  *	*_bit() want use of volatile.
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@@ -35,10 +20,10 @@
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 static __inline__ void set_bit(int nr, volatile unsigned long * addr)
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 {
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-	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
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+	unsigned long mask = BIT_MASK(nr);
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 	unsigned long flags;
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-	addr += (nr >> SHIFT_PER_LONG);
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+	addr += BIT_WORD(nr);
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 	_atomic_spin_lock_irqsave(addr, flags);
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 	*addr |= mask;
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 	_atomic_spin_unlock_irqrestore(addr, flags);
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@@ -46,21 +31,21 @@
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 static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
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 {
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-	unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr));
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+	unsigned long mask = BIT_MASK(nr);
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 	unsigned long flags;
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-	addr += (nr >> SHIFT_PER_LONG);
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+	addr += BIT_WORD(nr);
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 	_atomic_spin_lock_irqsave(addr, flags);
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-	*addr &= mask;
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+	*addr &= ~mask;
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 	_atomic_spin_unlock_irqrestore(addr, flags);
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 }
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 static __inline__ void change_bit(int nr, volatile unsigned long * addr)
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 {
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-	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
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+	unsigned long mask = BIT_MASK(nr);
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 	unsigned long flags;
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-	addr += (nr >> SHIFT_PER_LONG);
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+	addr += BIT_WORD(nr);
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 	_atomic_spin_lock_irqsave(addr, flags);
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 	*addr ^= mask;
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 	_atomic_spin_unlock_irqrestore(addr, flags);
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@@ -68,12 +53,12 @@
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 static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
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 {
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-	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
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+	unsigned long mask = BIT_MASK(nr);
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 	unsigned long old;
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 	unsigned long flags;
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 	int set;
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-	addr += (nr >> SHIFT_PER_LONG);
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+	addr += BIT_WORD(nr);
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 	_atomic_spin_lock_irqsave(addr, flags);
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 	old = *addr;
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 	set = (old & mask) ? 1 : 0;
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@@ -86,12 +71,12 @@
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 static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
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 {
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-	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
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+	unsigned long mask = BIT_MASK(nr);
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 	unsigned long old;
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 	unsigned long flags;
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 	int set;
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-	addr += (nr >> SHIFT_PER_LONG);
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+	addr += BIT_WORD(nr);
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 	_atomic_spin_lock_irqsave(addr, flags);
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 	old = *addr;
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 	set = (old & mask) ? 1 : 0;
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@@ -104,11 +89,11 @@
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 static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
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 {
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-	unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
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+	unsigned long mask = BIT_MASK(nr);
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 	unsigned long oldbit;
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 	unsigned long flags;
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-	addr += (nr >> SHIFT_PER_LONG);
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+	addr += BIT_WORD(nr);
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 	_atomic_spin_lock_irqsave(addr, flags);
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 	oldbit = *addr;
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 	*addr = oldbit ^ mask;
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@@ -188,7 +173,7 @@
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  * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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  */
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-static __inline__ int fls(int x)
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+static __inline__ int fls(unsigned int x)
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 {
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 	int ret;
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 	if (!x)