| .. | .. |
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| 2 | 2 | #ifndef __ASM_BARRIER_H |
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| 3 | 3 | #define __ASM_BARRIER_H |
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| 4 | 4 | |
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| 5 | +#include <asm/alternative.h> |
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| 6 | + |
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| 5 | 7 | #ifndef __ASSEMBLY__ |
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| 6 | 8 | |
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| 7 | 9 | /* The synchronize caches instruction executes as a nop on systems in |
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| 8 | 10 | which all memory references are performed in order. */ |
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| 9 | | -#define synchronize_caches() __asm__ __volatile__ ("sync" : : : "memory") |
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| 11 | +#define synchronize_caches() asm volatile("sync" \ |
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| 12 | + ALTERNATIVE(ALT_COND_NO_SMP, INSN_NOP) \ |
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| 13 | + : : : "memory") |
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| 10 | 14 | |
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| 11 | 15 | #if defined(CONFIG_SMP) |
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| 12 | 16 | #define mb() do { synchronize_caches(); } while (0) |
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