| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * Based on arch/arm/kernel/traps.c |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright (C) 1995-2009 Russell King |
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| 5 | 6 | * Copyright (C) 2012 ARM Ltd. |
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| 6 | | - * |
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| 7 | | - * This program is free software; you can redistribute it and/or modify |
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| 8 | | - * it under the terms of the GNU General Public License version 2 as |
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| 9 | | - * published by the Free Software Foundation. |
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| 10 | | - * |
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| 11 | | - * This program is distributed in the hope that it will be useful, |
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| 12 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 14 | | - * GNU General Public License for more details. |
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| 15 | | - * |
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| 16 | | - * You should have received a copy of the GNU General Public License |
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| 17 | | - * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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| 18 | 7 | */ |
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| 19 | 8 | |
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| 20 | 9 | #include <linux/bug.h> |
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| 10 | +#include <linux/context_tracking.h> |
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| 21 | 11 | #include <linux/signal.h> |
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| 22 | 12 | #include <linux/personality.h> |
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| 23 | 13 | #include <linux/kallsyms.h> |
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| 14 | +#include <linux/kprobes.h> |
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| 24 | 15 | #include <linux/spinlock.h> |
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| 25 | 16 | #include <linux/uaccess.h> |
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| 26 | 17 | #include <linux/hardirq.h> |
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| .. | .. |
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| 43 | 34 | #include <asm/daifflags.h> |
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| 44 | 35 | #include <asm/debug-monitors.h> |
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| 45 | 36 | #include <asm/esr.h> |
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| 37 | +#include <asm/exception.h> |
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| 38 | +#include <asm/extable.h> |
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| 46 | 39 | #include <asm/insn.h> |
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| 40 | +#include <asm/kprobes.h> |
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| 47 | 41 | #include <asm/traps.h> |
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| 48 | 42 | #include <asm/smp.h> |
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| 49 | 43 | #include <asm/stack_pointer.h> |
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| .. | .. |
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| 51 | 45 | #include <asm/exception.h> |
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| 52 | 46 | #include <asm/system_misc.h> |
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| 53 | 47 | #include <asm/sysreg.h> |
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| 48 | + |
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| 49 | +#include <trace/hooks/traps.h> |
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| 54 | 50 | |
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| 55 | 51 | static const char *handler[]= { |
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| 56 | 52 | "Synchronous Abort", |
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| .. | .. |
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| 61 | 57 | |
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| 62 | 58 | int show_unhandled_signals = 0; |
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| 63 | 59 | |
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| 64 | | -static void dump_backtrace_entry(unsigned long where) |
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| 65 | | -{ |
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| 66 | | - printk(" %pS\n", (void *)where); |
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| 67 | | -} |
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| 68 | | - |
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| 69 | | -static void __dump_instr(const char *lvl, struct pt_regs *regs) |
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| 60 | +static void dump_kernel_instr(const char *lvl, struct pt_regs *regs) |
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| 70 | 61 | { |
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| 71 | 62 | unsigned long addr = instruction_pointer(regs); |
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| 72 | 63 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; |
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| 73 | 64 | int i; |
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| 74 | 65 | |
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| 66 | + if (user_mode(regs)) |
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| 67 | + return; |
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| 68 | + |
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| 75 | 69 | for (i = -4; i < 1; i++) { |
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| 76 | 70 | unsigned int val, bad; |
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| 77 | 71 | |
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| 78 | | - bad = get_user(val, &((u32 *)addr)[i]); |
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| 72 | + bad = aarch64_insn_read(&((u32 *)addr)[i], &val); |
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| 79 | 73 | |
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| 80 | 74 | if (!bad) |
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| 81 | 75 | p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); |
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| .. | .. |
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| 84 | 78 | break; |
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| 85 | 79 | } |
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| 86 | 80 | } |
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| 81 | + |
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| 87 | 82 | printk("%sCode: %s\n", lvl, str); |
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| 88 | | -} |
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| 89 | | - |
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| 90 | | -static void dump_instr(const char *lvl, struct pt_regs *regs) |
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| 91 | | -{ |
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| 92 | | - if (!user_mode(regs)) { |
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| 93 | | - mm_segment_t fs = get_fs(); |
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| 94 | | - set_fs(KERNEL_DS); |
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| 95 | | - __dump_instr(lvl, regs); |
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| 96 | | - set_fs(fs); |
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| 97 | | - } else { |
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| 98 | | - __dump_instr(lvl, regs); |
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| 99 | | - } |
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| 100 | | -} |
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| 101 | | - |
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| 102 | | -void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) |
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| 103 | | -{ |
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| 104 | | - struct stackframe frame; |
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| 105 | | - int skip = 0; |
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| 106 | | - |
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| 107 | | - pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); |
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| 108 | | - |
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| 109 | | - if (regs) { |
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| 110 | | - if (user_mode(regs)) |
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| 111 | | - return; |
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| 112 | | - skip = 1; |
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| 113 | | - } |
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| 114 | | - |
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| 115 | | - if (!tsk) |
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| 116 | | - tsk = current; |
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| 117 | | - |
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| 118 | | - if (!try_get_task_stack(tsk)) |
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| 119 | | - return; |
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| 120 | | - |
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| 121 | | - if (tsk == current) { |
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| 122 | | - frame.fp = (unsigned long)__builtin_frame_address(0); |
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| 123 | | - frame.pc = (unsigned long)dump_backtrace; |
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| 124 | | - } else { |
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| 125 | | - /* |
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| 126 | | - * task blocked in __switch_to |
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| 127 | | - */ |
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| 128 | | - frame.fp = thread_saved_fp(tsk); |
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| 129 | | - frame.pc = thread_saved_pc(tsk); |
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| 130 | | - } |
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| 131 | | -#ifdef CONFIG_FUNCTION_GRAPH_TRACER |
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| 132 | | - frame.graph = tsk->curr_ret_stack; |
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| 133 | | -#endif |
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| 134 | | - |
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| 135 | | - printk("Call trace:\n"); |
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| 136 | | - do { |
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| 137 | | - /* skip until specified stack frame */ |
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| 138 | | - if (!skip) { |
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| 139 | | - dump_backtrace_entry(frame.pc); |
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| 140 | | - } else if (frame.fp == regs->regs[29]) { |
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| 141 | | - skip = 0; |
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| 142 | | - /* |
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| 143 | | - * Mostly, this is the case where this function is |
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| 144 | | - * called in panic/abort. As exception handler's |
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| 145 | | - * stack frame does not contain the corresponding pc |
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| 146 | | - * at which an exception has taken place, use regs->pc |
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| 147 | | - * instead. |
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| 148 | | - */ |
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| 149 | | - dump_backtrace_entry(regs->pc); |
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| 150 | | - } |
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| 151 | | - } while (!unwind_frame(tsk, &frame)); |
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| 152 | | - |
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| 153 | | - put_task_stack(tsk); |
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| 154 | | -} |
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| 155 | | - |
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| 156 | | -void show_stack(struct task_struct *tsk, unsigned long *sp) |
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| 157 | | -{ |
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| 158 | | - dump_backtrace(NULL, tsk); |
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| 159 | | - barrier(); |
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| 160 | 83 | } |
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| 161 | 84 | |
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| 162 | 85 | #ifdef CONFIG_PREEMPT |
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| 163 | 86 | #define S_PREEMPT " PREEMPT" |
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| 87 | +#elif defined(CONFIG_PREEMPT_RT) |
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| 88 | +#define S_PREEMPT " PREEMPT_RT" |
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| 164 | 89 | #else |
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| 165 | 90 | #define S_PREEMPT "" |
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| 166 | 91 | #endif |
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| 92 | + |
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| 167 | 93 | #define S_SMP " SMP" |
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| 168 | 94 | |
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| 169 | 95 | static int __die(const char *str, int err, struct pt_regs *regs) |
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| 170 | 96 | { |
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| 171 | | - struct task_struct *tsk = current; |
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| 172 | 97 | static int die_counter; |
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| 173 | 98 | int ret; |
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| 174 | 99 | |
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| .. | .. |
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| 181 | 106 | return ret; |
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| 182 | 107 | |
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| 183 | 108 | print_modules(); |
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| 184 | | - pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n", |
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| 185 | | - TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), |
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| 186 | | - end_of_stack(tsk)); |
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| 187 | 109 | show_regs(regs); |
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| 188 | 110 | |
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| 189 | | - if (!user_mode(regs)) |
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| 190 | | - dump_instr(KERN_EMERG, regs); |
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| 111 | + dump_kernel_instr(KERN_EMERG, regs); |
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| 191 | 112 | |
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| 192 | 113 | return ret; |
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| 193 | 114 | } |
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| .. | .. |
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| 218 | 139 | oops_exit(); |
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| 219 | 140 | |
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| 220 | 141 | if (in_interrupt()) |
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| 221 | | - panic("Fatal exception in interrupt"); |
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| 142 | + panic("%s: Fatal exception in interrupt", str); |
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| 222 | 143 | if (panic_on_oops) |
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| 223 | | - panic("Fatal exception"); |
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| 144 | + panic("%s: Fatal exception", str); |
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| 224 | 145 | |
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| 225 | 146 | raw_spin_unlock_irqrestore(&die_lock, flags); |
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| 226 | 147 | |
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| .. | .. |
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| 228 | 149 | do_exit(SIGSEGV); |
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| 229 | 150 | } |
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| 230 | 151 | |
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| 231 | | -static bool show_unhandled_signals_ratelimited(void) |
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| 152 | +static void arm64_show_signal(int signo, const char *str) |
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| 232 | 153 | { |
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| 233 | 154 | static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, |
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| 234 | 155 | DEFAULT_RATELIMIT_BURST); |
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| 235 | | - return show_unhandled_signals && __ratelimit(&rs); |
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| 236 | | -} |
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| 237 | | - |
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| 238 | | -void arm64_force_sig_info(struct siginfo *info, const char *str, |
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| 239 | | - struct task_struct *tsk) |
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| 240 | | -{ |
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| 156 | + struct task_struct *tsk = current; |
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| 241 | 157 | unsigned int esr = tsk->thread.fault_code; |
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| 242 | 158 | struct pt_regs *regs = task_pt_regs(tsk); |
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| 243 | 159 | |
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| 244 | | - if (!unhandled_signal(tsk, info->si_signo)) |
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| 245 | | - goto send_sig; |
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| 246 | | - |
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| 247 | | - if (!show_unhandled_signals_ratelimited()) |
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| 248 | | - goto send_sig; |
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| 160 | + /* Leave if the signal won't be shown */ |
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| 161 | + if (!show_unhandled_signals || |
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| 162 | + !unhandled_signal(tsk, signo) || |
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| 163 | + !__ratelimit(&rs)) |
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| 164 | + return; |
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| 249 | 165 | |
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| 250 | 166 | pr_info("%s[%d]: unhandled exception: ", tsk->comm, task_pid_nr(tsk)); |
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| 251 | 167 | if (esr) |
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| .. | .. |
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| 255 | 171 | print_vma_addr(KERN_CONT " in ", regs->pc); |
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| 256 | 172 | pr_cont("\n"); |
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| 257 | 173 | __show_regs(regs); |
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| 174 | +} |
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| 258 | 175 | |
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| 259 | | -send_sig: |
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| 260 | | - force_sig_info(info->si_signo, info, tsk); |
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| 176 | +void arm64_force_sig_fault(int signo, int code, unsigned long far, |
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| 177 | + const char *str) |
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| 178 | +{ |
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| 179 | + arm64_show_signal(signo, str); |
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| 180 | + if (signo == SIGKILL) |
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| 181 | + force_sig(SIGKILL); |
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| 182 | + else |
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| 183 | + force_sig_fault(signo, code, (void __user *)far); |
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| 184 | +} |
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| 185 | + |
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| 186 | +void arm64_force_sig_mceerr(int code, unsigned long far, short lsb, |
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| 187 | + const char *str) |
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| 188 | +{ |
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| 189 | + arm64_show_signal(SIGBUS, str); |
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| 190 | + force_sig_mceerr(code, (void __user *)far, lsb); |
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| 191 | +} |
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| 192 | + |
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| 193 | +void arm64_force_sig_ptrace_errno_trap(int errno, unsigned long far, |
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| 194 | + const char *str) |
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| 195 | +{ |
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| 196 | + arm64_show_signal(SIGTRAP, str); |
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| 197 | + force_sig_ptrace_errno_trap(errno, (void __user *)far); |
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| 261 | 198 | } |
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| 262 | 199 | |
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| 263 | 200 | void arm64_notify_die(const char *str, struct pt_regs *regs, |
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| 264 | | - struct siginfo *info, int err) |
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| 201 | + int signo, int sicode, unsigned long far, |
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| 202 | + int err) |
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| 265 | 203 | { |
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| 266 | 204 | if (user_mode(regs)) { |
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| 267 | 205 | WARN_ON(regs != current_pt_regs()); |
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| 268 | 206 | current->thread.fault_address = 0; |
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| 269 | 207 | current->thread.fault_code = err; |
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| 270 | | - arm64_force_sig_info(info, str, current); |
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| 208 | + |
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| 209 | + arm64_force_sig_fault(signo, sicode, far, str); |
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| 271 | 210 | } else { |
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| 272 | 211 | die(str, regs, err); |
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| 273 | 212 | } |
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| 274 | 213 | } |
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| 214 | + |
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| 215 | +#ifdef CONFIG_COMPAT |
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| 216 | +#define PSTATE_IT_1_0_SHIFT 25 |
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| 217 | +#define PSTATE_IT_1_0_MASK (0x3 << PSTATE_IT_1_0_SHIFT) |
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| 218 | +#define PSTATE_IT_7_2_SHIFT 10 |
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| 219 | +#define PSTATE_IT_7_2_MASK (0x3f << PSTATE_IT_7_2_SHIFT) |
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| 220 | + |
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| 221 | +static u32 compat_get_it_state(struct pt_regs *regs) |
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| 222 | +{ |
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| 223 | + u32 it, pstate = regs->pstate; |
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| 224 | + |
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| 225 | + it = (pstate & PSTATE_IT_1_0_MASK) >> PSTATE_IT_1_0_SHIFT; |
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| 226 | + it |= ((pstate & PSTATE_IT_7_2_MASK) >> PSTATE_IT_7_2_SHIFT) << 2; |
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| 227 | + |
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| 228 | + return it; |
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| 229 | +} |
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| 230 | + |
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| 231 | +static void compat_set_it_state(struct pt_regs *regs, u32 it) |
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| 232 | +{ |
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| 233 | + u32 pstate_it; |
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| 234 | + |
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| 235 | + pstate_it = (it << PSTATE_IT_1_0_SHIFT) & PSTATE_IT_1_0_MASK; |
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| 236 | + pstate_it |= ((it >> 2) << PSTATE_IT_7_2_SHIFT) & PSTATE_IT_7_2_MASK; |
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| 237 | + |
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| 238 | + regs->pstate &= ~PSR_AA32_IT_MASK; |
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| 239 | + regs->pstate |= pstate_it; |
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| 240 | +} |
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| 241 | + |
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| 242 | +static void advance_itstate(struct pt_regs *regs) |
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| 243 | +{ |
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| 244 | + u32 it; |
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| 245 | + |
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| 246 | + /* ARM mode */ |
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| 247 | + if (!(regs->pstate & PSR_AA32_T_BIT) || |
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| 248 | + !(regs->pstate & PSR_AA32_IT_MASK)) |
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| 249 | + return; |
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| 250 | + |
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| 251 | + it = compat_get_it_state(regs); |
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| 252 | + |
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| 253 | + /* |
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| 254 | + * If this is the last instruction of the block, wipe the IT |
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| 255 | + * state. Otherwise advance it. |
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| 256 | + */ |
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| 257 | + if (!(it & 7)) |
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| 258 | + it = 0; |
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| 259 | + else |
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| 260 | + it = (it & 0xe0) | ((it << 1) & 0x1f); |
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| 261 | + |
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| 262 | + compat_set_it_state(regs, it); |
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| 263 | +} |
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| 264 | +#else |
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| 265 | +static void advance_itstate(struct pt_regs *regs) |
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| 266 | +{ |
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| 267 | +} |
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| 268 | +#endif |
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| 275 | 269 | |
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| 276 | 270 | void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size) |
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| 277 | 271 | { |
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| .. | .. |
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| 283 | 277 | */ |
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| 284 | 278 | if (user_mode(regs)) |
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| 285 | 279 | user_fastforward_single_step(current); |
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| 280 | + |
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| 281 | + if (compat_user_mode(regs)) |
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| 282 | + advance_itstate(regs); |
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| 283 | + else |
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| 284 | + regs->pstate &= ~PSR_BTYPE_MASK; |
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| 286 | 285 | } |
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| 287 | 286 | |
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| 288 | 287 | static LIST_HEAD(undef_hook); |
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| .. | .. |
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| 316 | 315 | |
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| 317 | 316 | if (!user_mode(regs)) { |
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| 318 | 317 | __le32 instr_le; |
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| 319 | | - if (probe_kernel_address((__force __le32 *)pc, instr_le)) |
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| 318 | + if (get_kernel_nofault(instr_le, (__force __le32 *)pc)) |
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| 320 | 319 | goto exit; |
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| 321 | 320 | instr = le32_to_cpu(instr_le); |
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| 322 | 321 | } else if (compat_thumb_mode(regs)) { |
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| .. | .. |
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| 352 | 351 | return fn ? fn(regs, instr) : 1; |
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| 353 | 352 | } |
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| 354 | 353 | |
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| 355 | | -void force_signal_inject(int signal, int code, unsigned long address) |
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| 354 | +void force_signal_inject(int signal, int code, unsigned long address, unsigned int err) |
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| 356 | 355 | { |
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| 357 | | - siginfo_t info; |
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| 358 | 356 | const char *desc; |
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| 359 | 357 | struct pt_regs *regs = current_pt_regs(); |
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| 360 | 358 | |
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| 361 | | - clear_siginfo(&info); |
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| 359 | + if (WARN_ON(!user_mode(regs))) |
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| 360 | + return; |
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| 362 | 361 | |
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| 363 | 362 | switch (signal) { |
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| 364 | 363 | case SIGILL: |
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| .. | .. |
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| 378 | 377 | signal = SIGKILL; |
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| 379 | 378 | } |
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| 380 | 379 | |
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| 381 | | - info.si_signo = signal; |
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| 382 | | - info.si_errno = 0; |
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| 383 | | - info.si_code = code; |
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| 384 | | - info.si_addr = (void __user *)address; |
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| 385 | | - |
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| 386 | | - arm64_notify_die(desc, regs, &info, 0); |
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| 380 | + arm64_notify_die(desc, regs, signal, code, address, err); |
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| 387 | 381 | } |
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| 388 | 382 | |
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| 389 | 383 | /* |
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| .. | .. |
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| 393 | 387 | { |
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| 394 | 388 | int code; |
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| 395 | 389 | |
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| 396 | | - down_read(¤t->mm->mmap_sem); |
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| 397 | | - if (find_vma(current->mm, addr) == NULL) |
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| 390 | + mmap_read_lock(current->mm); |
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| 391 | + if (find_vma(current->mm, untagged_addr(addr)) == NULL) |
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| 398 | 392 | code = SEGV_MAPERR; |
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| 399 | 393 | else |
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| 400 | 394 | code = SEGV_ACCERR; |
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| 401 | | - up_read(¤t->mm->mmap_sem); |
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| 395 | + mmap_read_unlock(current->mm); |
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| 402 | 396 | |
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| 403 | | - force_signal_inject(SIGSEGV, code, addr); |
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| 397 | + force_signal_inject(SIGSEGV, code, addr, 0); |
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| 404 | 398 | } |
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| 405 | 399 | |
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| 406 | | -asmlinkage void __exception do_undefinstr(struct pt_regs *regs) |
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| 400 | +void do_undefinstr(struct pt_regs *regs) |
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| 407 | 401 | { |
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| 408 | 402 | /* check for AArch32 breakpoint instructions */ |
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| 409 | 403 | if (!aarch32_break_handler(regs)) |
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| .. | .. |
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| 412 | 406 | if (call_undef_hook(regs) == 0) |
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| 413 | 407 | return; |
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| 414 | 408 | |
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| 415 | | - force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc); |
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| 409 | + trace_android_rvh_do_undefinstr(regs, user_mode(regs)); |
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| 416 | 410 | BUG_ON(!user_mode(regs)); |
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| 411 | + force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0); |
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| 417 | 412 | } |
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| 413 | +NOKPROBE_SYMBOL(do_undefinstr); |
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| 418 | 414 | |
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| 419 | | -void cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused) |
|---|
| 415 | +void do_bti(struct pt_regs *regs) |
|---|
| 420 | 416 | { |
|---|
| 421 | | - sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCI, 0); |
|---|
| 417 | + BUG_ON(!user_mode(regs)); |
|---|
| 418 | + force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0); |
|---|
| 422 | 419 | } |
|---|
| 420 | +NOKPROBE_SYMBOL(do_bti); |
|---|
| 421 | + |
|---|
| 422 | +void do_ptrauth_fault(struct pt_regs *regs, unsigned int esr) |
|---|
| 423 | +{ |
|---|
| 424 | + /* |
|---|
| 425 | + * Unexpected FPAC exception or pointer authentication failure in |
|---|
| 426 | + * the kernel: kill the task before it does any more harm. |
|---|
| 427 | + */ |
|---|
| 428 | + trace_android_rvh_do_ptrauth_fault(regs, esr, user_mode(regs)); |
|---|
| 429 | + BUG_ON(!user_mode(regs)); |
|---|
| 430 | + force_signal_inject(SIGILL, ILL_ILLOPN, regs->pc, esr); |
|---|
| 431 | +} |
|---|
| 432 | +NOKPROBE_SYMBOL(do_ptrauth_fault); |
|---|
| 423 | 433 | |
|---|
| 424 | 434 | #define __user_cache_maint(insn, address, res) \ |
|---|
| 425 | 435 | if (address >= user_addr_max()) { \ |
|---|
| .. | .. |
|---|
| 443 | 453 | |
|---|
| 444 | 454 | static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 445 | 455 | { |
|---|
| 446 | | - unsigned long address; |
|---|
| 447 | | - int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; |
|---|
| 456 | + unsigned long tagged_address, address; |
|---|
| 457 | + int rt = ESR_ELx_SYS64_ISS_RT(esr); |
|---|
| 448 | 458 | int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT; |
|---|
| 449 | 459 | int ret = 0; |
|---|
| 450 | 460 | |
|---|
| 451 | | - address = untagged_addr(pt_regs_read_reg(regs, rt)); |
|---|
| 461 | + tagged_address = pt_regs_read_reg(regs, rt); |
|---|
| 462 | + address = untagged_addr(tagged_address); |
|---|
| 452 | 463 | |
|---|
| 453 | 464 | switch (crm) { |
|---|
| 454 | 465 | case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */ |
|---|
| .. | .. |
|---|
| 456 | 467 | break; |
|---|
| 457 | 468 | case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */ |
|---|
| 458 | 469 | __user_cache_maint("dc civac", address, ret); |
|---|
| 470 | + break; |
|---|
| 471 | + case ESR_ELx_SYS64_ISS_CRM_DC_CVADP: /* DC CVADP */ |
|---|
| 472 | + __user_cache_maint("sys 3, c7, c13, 1", address, ret); |
|---|
| 459 | 473 | break; |
|---|
| 460 | 474 | case ESR_ELx_SYS64_ISS_CRM_DC_CVAP: /* DC CVAP */ |
|---|
| 461 | 475 | __user_cache_maint("sys 3, c7, c12, 1", address, ret); |
|---|
| .. | .. |
|---|
| 467 | 481 | __user_cache_maint("ic ivau", address, ret); |
|---|
| 468 | 482 | break; |
|---|
| 469 | 483 | default: |
|---|
| 470 | | - force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc); |
|---|
| 484 | + force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0); |
|---|
| 471 | 485 | return; |
|---|
| 472 | 486 | } |
|---|
| 473 | 487 | |
|---|
| 474 | 488 | if (ret) |
|---|
| 475 | | - arm64_notify_segfault(address); |
|---|
| 489 | + arm64_notify_segfault(tagged_address); |
|---|
| 476 | 490 | else |
|---|
| 477 | 491 | arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE); |
|---|
| 478 | 492 | } |
|---|
| 479 | 493 | |
|---|
| 480 | 494 | static void ctr_read_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 481 | 495 | { |
|---|
| 482 | | - int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; |
|---|
| 496 | + int rt = ESR_ELx_SYS64_ISS_RT(esr); |
|---|
| 483 | 497 | unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0); |
|---|
| 484 | 498 | |
|---|
| 485 | 499 | if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) { |
|---|
| .. | .. |
|---|
| 498 | 512 | |
|---|
| 499 | 513 | static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 500 | 514 | { |
|---|
| 501 | | - int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; |
|---|
| 515 | + int rt = ESR_ELx_SYS64_ISS_RT(esr); |
|---|
| 502 | 516 | |
|---|
| 503 | | - pt_regs_write_reg(regs, rt, arch_counter_get_cntvct()); |
|---|
| 517 | + pt_regs_write_reg(regs, rt, arch_timer_read_counter()); |
|---|
| 504 | 518 | arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE); |
|---|
| 505 | 519 | } |
|---|
| 506 | 520 | |
|---|
| 507 | 521 | static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 508 | 522 | { |
|---|
| 509 | | - int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; |
|---|
| 523 | + int rt = ESR_ELx_SYS64_ISS_RT(esr); |
|---|
| 510 | 524 | |
|---|
| 511 | 525 | pt_regs_write_reg(regs, rt, arch_timer_get_rate()); |
|---|
| 526 | + arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE); |
|---|
| 527 | +} |
|---|
| 528 | + |
|---|
| 529 | +static void mrs_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 530 | +{ |
|---|
| 531 | + u32 sysreg, rt; |
|---|
| 532 | + |
|---|
| 533 | + rt = ESR_ELx_SYS64_ISS_RT(esr); |
|---|
| 534 | + sysreg = esr_sys64_to_sysreg(esr); |
|---|
| 535 | + |
|---|
| 536 | + if (do_emulate_mrs(regs, sysreg, rt) != 0) |
|---|
| 537 | + force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0); |
|---|
| 538 | +} |
|---|
| 539 | + |
|---|
| 540 | +static void wfi_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 541 | +{ |
|---|
| 512 | 542 | arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE); |
|---|
| 513 | 543 | } |
|---|
| 514 | 544 | |
|---|
| .. | .. |
|---|
| 518 | 548 | void (*handler)(unsigned int esr, struct pt_regs *regs); |
|---|
| 519 | 549 | }; |
|---|
| 520 | 550 | |
|---|
| 521 | | -static struct sys64_hook sys64_hooks[] = { |
|---|
| 551 | +static const struct sys64_hook sys64_hooks[] = { |
|---|
| 522 | 552 | { |
|---|
| 523 | 553 | .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK, |
|---|
| 524 | 554 | .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL, |
|---|
| .. | .. |
|---|
| 542 | 572 | .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ, |
|---|
| 543 | 573 | .handler = cntfrq_read_handler, |
|---|
| 544 | 574 | }, |
|---|
| 575 | + { |
|---|
| 576 | + /* Trap read access to CPUID registers */ |
|---|
| 577 | + .esr_mask = ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK, |
|---|
| 578 | + .esr_val = ESR_ELx_SYS64_ISS_SYS_MRS_OP_VAL, |
|---|
| 579 | + .handler = mrs_handler, |
|---|
| 580 | + }, |
|---|
| 581 | + { |
|---|
| 582 | + /* Trap WFI instructions executed in userspace */ |
|---|
| 583 | + .esr_mask = ESR_ELx_WFx_MASK, |
|---|
| 584 | + .esr_val = ESR_ELx_WFx_WFI_VAL, |
|---|
| 585 | + .handler = wfi_handler, |
|---|
| 586 | + }, |
|---|
| 545 | 587 | {}, |
|---|
| 546 | 588 | }; |
|---|
| 547 | 589 | |
|---|
| 548 | | -asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs) |
|---|
| 590 | +#ifdef CONFIG_COMPAT |
|---|
| 591 | +static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs) |
|---|
| 549 | 592 | { |
|---|
| 550 | | - struct sys64_hook *hook; |
|---|
| 593 | + int cond; |
|---|
| 594 | + |
|---|
| 595 | + /* Only a T32 instruction can trap without CV being set */ |
|---|
| 596 | + if (!(esr & ESR_ELx_CV)) { |
|---|
| 597 | + u32 it; |
|---|
| 598 | + |
|---|
| 599 | + it = compat_get_it_state(regs); |
|---|
| 600 | + if (!it) |
|---|
| 601 | + return true; |
|---|
| 602 | + |
|---|
| 603 | + cond = it >> 4; |
|---|
| 604 | + } else { |
|---|
| 605 | + cond = (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT; |
|---|
| 606 | + } |
|---|
| 607 | + |
|---|
| 608 | + return aarch32_opcode_cond_checks[cond](regs->pstate); |
|---|
| 609 | +} |
|---|
| 610 | + |
|---|
| 611 | +static void compat_cntfrq_read_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 612 | +{ |
|---|
| 613 | + int reg = (esr & ESR_ELx_CP15_32_ISS_RT_MASK) >> ESR_ELx_CP15_32_ISS_RT_SHIFT; |
|---|
| 614 | + |
|---|
| 615 | + pt_regs_write_reg(regs, reg, arch_timer_get_rate()); |
|---|
| 616 | + arm64_skip_faulting_instruction(regs, 4); |
|---|
| 617 | +} |
|---|
| 618 | + |
|---|
| 619 | +static const struct sys64_hook cp15_32_hooks[] = { |
|---|
| 620 | + { |
|---|
| 621 | + .esr_mask = ESR_ELx_CP15_32_ISS_SYS_MASK, |
|---|
| 622 | + .esr_val = ESR_ELx_CP15_32_ISS_SYS_CNTFRQ, |
|---|
| 623 | + .handler = compat_cntfrq_read_handler, |
|---|
| 624 | + }, |
|---|
| 625 | + {}, |
|---|
| 626 | +}; |
|---|
| 627 | + |
|---|
| 628 | +static void compat_cntvct_read_handler(unsigned int esr, struct pt_regs *regs) |
|---|
| 629 | +{ |
|---|
| 630 | + int rt = (esr & ESR_ELx_CP15_64_ISS_RT_MASK) >> ESR_ELx_CP15_64_ISS_RT_SHIFT; |
|---|
| 631 | + int rt2 = (esr & ESR_ELx_CP15_64_ISS_RT2_MASK) >> ESR_ELx_CP15_64_ISS_RT2_SHIFT; |
|---|
| 632 | + u64 val = arch_timer_read_counter(); |
|---|
| 633 | + |
|---|
| 634 | + pt_regs_write_reg(regs, rt, lower_32_bits(val)); |
|---|
| 635 | + pt_regs_write_reg(regs, rt2, upper_32_bits(val)); |
|---|
| 636 | + arm64_skip_faulting_instruction(regs, 4); |
|---|
| 637 | +} |
|---|
| 638 | + |
|---|
| 639 | +static const struct sys64_hook cp15_64_hooks[] = { |
|---|
| 640 | + { |
|---|
| 641 | + .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK, |
|---|
| 642 | + .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT, |
|---|
| 643 | + .handler = compat_cntvct_read_handler, |
|---|
| 644 | + }, |
|---|
| 645 | + {}, |
|---|
| 646 | +}; |
|---|
| 647 | + |
|---|
| 648 | +void do_cp15instr(unsigned int esr, struct pt_regs *regs) |
|---|
| 649 | +{ |
|---|
| 650 | + const struct sys64_hook *hook, *hook_base; |
|---|
| 651 | + |
|---|
| 652 | + if (!cp15_cond_valid(esr, regs)) { |
|---|
| 653 | + /* |
|---|
| 654 | + * There is no T16 variant of a CP access, so we |
|---|
| 655 | + * always advance PC by 4 bytes. |
|---|
| 656 | + */ |
|---|
| 657 | + arm64_skip_faulting_instruction(regs, 4); |
|---|
| 658 | + return; |
|---|
| 659 | + } |
|---|
| 660 | + |
|---|
| 661 | + switch (ESR_ELx_EC(esr)) { |
|---|
| 662 | + case ESR_ELx_EC_CP15_32: |
|---|
| 663 | + hook_base = cp15_32_hooks; |
|---|
| 664 | + break; |
|---|
| 665 | + case ESR_ELx_EC_CP15_64: |
|---|
| 666 | + hook_base = cp15_64_hooks; |
|---|
| 667 | + break; |
|---|
| 668 | + default: |
|---|
| 669 | + do_undefinstr(regs); |
|---|
| 670 | + return; |
|---|
| 671 | + } |
|---|
| 672 | + |
|---|
| 673 | + for (hook = hook_base; hook->handler; hook++) |
|---|
| 674 | + if ((hook->esr_mask & esr) == hook->esr_val) { |
|---|
| 675 | + hook->handler(esr, regs); |
|---|
| 676 | + return; |
|---|
| 677 | + } |
|---|
| 678 | + |
|---|
| 679 | + /* |
|---|
| 680 | + * New cp15 instructions may previously have been undefined at |
|---|
| 681 | + * EL0. Fall back to our usual undefined instruction handler |
|---|
| 682 | + * so that we handle these consistently. |
|---|
| 683 | + */ |
|---|
| 684 | + do_undefinstr(regs); |
|---|
| 685 | +} |
|---|
| 686 | +NOKPROBE_SYMBOL(do_cp15instr); |
|---|
| 687 | +#endif |
|---|
| 688 | + |
|---|
| 689 | +void do_sysinstr(unsigned int esr, struct pt_regs *regs) |
|---|
| 690 | +{ |
|---|
| 691 | + const struct sys64_hook *hook; |
|---|
| 551 | 692 | |
|---|
| 552 | 693 | for (hook = sys64_hooks; hook->handler; hook++) |
|---|
| 553 | 694 | if ((hook->esr_mask & esr) == hook->esr_val) { |
|---|
| .. | .. |
|---|
| 562 | 703 | */ |
|---|
| 563 | 704 | do_undefinstr(regs); |
|---|
| 564 | 705 | } |
|---|
| 706 | +NOKPROBE_SYMBOL(do_sysinstr); |
|---|
| 565 | 707 | |
|---|
| 566 | 708 | static const char *esr_class_str[] = { |
|---|
| 567 | 709 | [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC", |
|---|
| .. | .. |
|---|
| 573 | 715 | [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC", |
|---|
| 574 | 716 | [ESR_ELx_EC_FP_ASIMD] = "ASIMD", |
|---|
| 575 | 717 | [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS", |
|---|
| 718 | + [ESR_ELx_EC_PAC] = "PAC", |
|---|
| 576 | 719 | [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC", |
|---|
| 720 | + [ESR_ELx_EC_BTI] = "BTI", |
|---|
| 577 | 721 | [ESR_ELx_EC_ILL] = "PSTATE.IL", |
|---|
| 578 | 722 | [ESR_ELx_EC_SVC32] = "SVC (AArch32)", |
|---|
| 579 | 723 | [ESR_ELx_EC_HVC32] = "HVC (AArch32)", |
|---|
| .. | .. |
|---|
| 583 | 727 | [ESR_ELx_EC_SMC64] = "SMC (AArch64)", |
|---|
| 584 | 728 | [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)", |
|---|
| 585 | 729 | [ESR_ELx_EC_SVE] = "SVE", |
|---|
| 730 | + [ESR_ELx_EC_ERET] = "ERET/ERETAA/ERETAB", |
|---|
| 731 | + [ESR_ELx_EC_FPAC] = "FPAC", |
|---|
| 586 | 732 | [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF", |
|---|
| 587 | 733 | [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)", |
|---|
| 588 | 734 | [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)", |
|---|
| .. | .. |
|---|
| 613 | 759 | * bad_mode handles the impossible case in the exception vector. This is always |
|---|
| 614 | 760 | * fatal. |
|---|
| 615 | 761 | */ |
|---|
| 616 | | -asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) |
|---|
| 762 | +asmlinkage void notrace bad_mode(struct pt_regs *regs, int reason, unsigned int esr) |
|---|
| 617 | 763 | { |
|---|
| 764 | + arm64_enter_nmi(regs); |
|---|
| 765 | + |
|---|
| 618 | 766 | console_verbose(); |
|---|
| 619 | 767 | |
|---|
| 620 | 768 | pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n", |
|---|
| 621 | 769 | handler[reason], smp_processor_id(), esr, |
|---|
| 622 | 770 | esr_get_class_string(esr)); |
|---|
| 623 | 771 | |
|---|
| 772 | + trace_android_rvh_bad_mode(regs, esr, reason); |
|---|
| 773 | + __show_regs(regs); |
|---|
| 624 | 774 | local_daif_mask(); |
|---|
| 625 | 775 | panic("bad mode"); |
|---|
| 626 | 776 | } |
|---|
| .. | .. |
|---|
| 629 | 779 | * bad_el0_sync handles unexpected, but potentially recoverable synchronous |
|---|
| 630 | 780 | * exceptions taken from EL0. Unlike bad_mode, this returns. |
|---|
| 631 | 781 | */ |
|---|
| 632 | | -asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr) |
|---|
| 782 | +void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr) |
|---|
| 633 | 783 | { |
|---|
| 634 | | - siginfo_t info; |
|---|
| 635 | | - void __user *pc = (void __user *)instruction_pointer(regs); |
|---|
| 636 | | - |
|---|
| 637 | | - clear_siginfo(&info); |
|---|
| 638 | | - info.si_signo = SIGILL; |
|---|
| 639 | | - info.si_errno = 0; |
|---|
| 640 | | - info.si_code = ILL_ILLOPC; |
|---|
| 641 | | - info.si_addr = pc; |
|---|
| 784 | + unsigned long pc = instruction_pointer(regs); |
|---|
| 642 | 785 | |
|---|
| 643 | 786 | current->thread.fault_address = 0; |
|---|
| 644 | 787 | current->thread.fault_code = esr; |
|---|
| 645 | 788 | |
|---|
| 646 | | - arm64_force_sig_info(&info, "Bad EL0 synchronous exception", current); |
|---|
| 789 | + arm64_force_sig_fault(SIGILL, ILL_ILLOPC, pc, |
|---|
| 790 | + "Bad EL0 synchronous exception"); |
|---|
| 647 | 791 | } |
|---|
| 648 | 792 | |
|---|
| 649 | 793 | #ifdef CONFIG_VMAP_STACK |
|---|
| .. | .. |
|---|
| 651 | 795 | DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack) |
|---|
| 652 | 796 | __aligned(16); |
|---|
| 653 | 797 | |
|---|
| 654 | | -asmlinkage void handle_bad_stack(struct pt_regs *regs) |
|---|
| 798 | +asmlinkage void noinstr handle_bad_stack(struct pt_regs *regs) |
|---|
| 655 | 799 | { |
|---|
| 656 | 800 | unsigned long tsk_stk = (unsigned long)current->stack; |
|---|
| 657 | 801 | unsigned long irq_stk = (unsigned long)this_cpu_read(irq_stack_ptr); |
|---|
| 658 | 802 | unsigned long ovf_stk = (unsigned long)this_cpu_ptr(overflow_stack); |
|---|
| 659 | 803 | unsigned int esr = read_sysreg(esr_el1); |
|---|
| 660 | 804 | unsigned long far = read_sysreg(far_el1); |
|---|
| 805 | + |
|---|
| 806 | + arm64_enter_nmi(regs); |
|---|
| 661 | 807 | |
|---|
| 662 | 808 | console_verbose(); |
|---|
| 663 | 809 | pr_emerg("Insufficient stack space to handle exception!"); |
|---|
| .. | .. |
|---|
| 668 | 814 | pr_emerg("Task stack: [0x%016lx..0x%016lx]\n", |
|---|
| 669 | 815 | tsk_stk, tsk_stk + THREAD_SIZE); |
|---|
| 670 | 816 | pr_emerg("IRQ stack: [0x%016lx..0x%016lx]\n", |
|---|
| 671 | | - irq_stk, irq_stk + THREAD_SIZE); |
|---|
| 817 | + irq_stk, irq_stk + IRQ_STACK_SIZE); |
|---|
| 672 | 818 | pr_emerg("Overflow stack: [0x%016lx..0x%016lx]\n", |
|---|
| 673 | 819 | ovf_stk, ovf_stk + OVERFLOW_STACK_SIZE); |
|---|
| 674 | 820 | |
|---|
| .. | .. |
|---|
| 689 | 835 | |
|---|
| 690 | 836 | pr_crit("SError Interrupt on CPU%d, code 0x%08x -- %s\n", |
|---|
| 691 | 837 | smp_processor_id(), esr, esr_get_class_string(esr)); |
|---|
| 838 | + |
|---|
| 839 | + trace_android_rvh_arm64_serror_panic(regs, esr); |
|---|
| 692 | 840 | if (regs) |
|---|
| 693 | 841 | __show_regs(regs); |
|---|
| 694 | 842 | |
|---|
| .. | .. |
|---|
| 716 | 864 | /* |
|---|
| 717 | 865 | * The CPU can't make progress. The exception may have |
|---|
| 718 | 866 | * been imprecise. |
|---|
| 867 | + * |
|---|
| 868 | + * Neoverse-N1 #1349291 means a non-KVM SError reported as |
|---|
| 869 | + * Unrecoverable should be treated as Uncontainable. We |
|---|
| 870 | + * call arm64_serror_panic() in both cases. |
|---|
| 719 | 871 | */ |
|---|
| 720 | 872 | return true; |
|---|
| 721 | 873 | |
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| .. | .. |
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| 726 | 878 | } |
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| 727 | 879 | } |
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| 728 | 880 | |
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| 729 | | -asmlinkage void do_serror(struct pt_regs *regs, unsigned int esr) |
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| 881 | +asmlinkage void noinstr do_serror(struct pt_regs *regs, unsigned int esr) |
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| 730 | 882 | { |
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| 731 | | - nmi_enter(); |
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| 883 | + arm64_enter_nmi(regs); |
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| 732 | 884 | |
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| 733 | 885 | /* non-RAS errors are not containable */ |
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| 734 | 886 | if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr)) |
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| 735 | 887 | arm64_serror_panic(regs, esr); |
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| 736 | 888 | |
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| 737 | | - nmi_exit(); |
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| 738 | | -} |
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| 739 | | - |
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| 740 | | -void __pte_error(const char *file, int line, unsigned long val) |
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| 741 | | -{ |
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| 742 | | - pr_err("%s:%d: bad pte %016lx.\n", file, line, val); |
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| 743 | | -} |
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| 744 | | - |
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| 745 | | -void __pmd_error(const char *file, int line, unsigned long val) |
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| 746 | | -{ |
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| 747 | | - pr_err("%s:%d: bad pmd %016lx.\n", file, line, val); |
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| 748 | | -} |
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| 749 | | - |
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| 750 | | -void __pud_error(const char *file, int line, unsigned long val) |
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| 751 | | -{ |
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| 752 | | - pr_err("%s:%d: bad pud %016lx.\n", file, line, val); |
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| 753 | | -} |
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| 754 | | - |
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| 755 | | -void __pgd_error(const char *file, int line, unsigned long val) |
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| 756 | | -{ |
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| 757 | | - pr_err("%s:%d: bad pgd %016lx.\n", file, line, val); |
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| 889 | + arm64_exit_nmi(regs); |
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| 758 | 890 | } |
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| 759 | 891 | |
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| 760 | 892 | /* GENERIC_BUG traps */ |
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| .. | .. |
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| 773 | 905 | |
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| 774 | 906 | static int bug_handler(struct pt_regs *regs, unsigned int esr) |
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| 775 | 907 | { |
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| 776 | | - if (user_mode(regs)) |
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| 777 | | - return DBG_HOOK_ERROR; |
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| 778 | | - |
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| 779 | 908 | switch (report_bug(regs->pc, regs)) { |
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| 780 | 909 | case BUG_TRAP_TYPE_BUG: |
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| 781 | 910 | die("Oops - BUG", regs, 0); |
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| .. | .. |
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| 795 | 924 | } |
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| 796 | 925 | |
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| 797 | 926 | static struct break_hook bug_break_hook = { |
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| 798 | | - .esr_val = 0xf2000000 | BUG_BRK_IMM, |
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| 799 | | - .esr_mask = 0xffffffff, |
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| 800 | 927 | .fn = bug_handler, |
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| 928 | + .imm = BUG_BRK_IMM, |
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| 929 | +}; |
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| 930 | + |
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| 931 | +static int reserved_fault_handler(struct pt_regs *regs, unsigned int esr) |
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| 932 | +{ |
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| 933 | + pr_err("%s generated an invalid instruction at %pS!\n", |
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| 934 | + "Kernel text patching", |
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| 935 | + (void *)instruction_pointer(regs)); |
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| 936 | + |
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| 937 | + /* We cannot handle this */ |
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| 938 | + return DBG_HOOK_ERROR; |
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| 939 | +} |
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| 940 | + |
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| 941 | +static struct break_hook fault_break_hook = { |
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| 942 | + .fn = reserved_fault_handler, |
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| 943 | + .imm = FAULT_BRK_IMM, |
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| 801 | 944 | }; |
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| 802 | 945 | |
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| 803 | 946 | #ifdef CONFIG_KASAN_SW_TAGS |
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| .. | .. |
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| 814 | 957 | size_t size = KASAN_ESR_SIZE(esr); |
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| 815 | 958 | u64 addr = regs->regs[0]; |
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| 816 | 959 | u64 pc = regs->pc; |
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| 817 | | - |
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| 818 | | - if (user_mode(regs)) |
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| 819 | | - return DBG_HOOK_ERROR; |
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| 820 | 960 | |
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| 821 | 961 | kasan_report(addr, size, write, pc); |
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| 822 | 962 | |
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| .. | .. |
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| 842 | 982 | return DBG_HOOK_HANDLED; |
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| 843 | 983 | } |
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| 844 | 984 | |
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| 845 | | -#define KASAN_ESR_VAL (0xf2000000 | KASAN_BRK_IMM) |
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| 846 | | -#define KASAN_ESR_MASK 0xffffff00 |
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| 847 | | - |
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| 848 | 985 | static struct break_hook kasan_break_hook = { |
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| 849 | | - .esr_val = KASAN_ESR_VAL, |
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| 850 | | - .esr_mask = KASAN_ESR_MASK, |
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| 851 | | - .fn = kasan_handler, |
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| 986 | + .fn = kasan_handler, |
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| 987 | + .imm = KASAN_BRK_IMM, |
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| 988 | + .mask = KASAN_BRK_MASK, |
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| 852 | 989 | }; |
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| 853 | 990 | #endif |
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| 854 | 991 | |
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| .. | .. |
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| 860 | 997 | struct pt_regs *regs) |
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| 861 | 998 | { |
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| 862 | 999 | #ifdef CONFIG_KASAN_SW_TAGS |
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| 863 | | - if ((esr & KASAN_ESR_MASK) == KASAN_ESR_VAL) |
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| 1000 | + unsigned int comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK; |
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| 1001 | + |
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| 1002 | + if ((comment & ~KASAN_BRK_MASK) == KASAN_BRK_IMM) |
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| 864 | 1003 | return kasan_handler(regs, esr) != DBG_HOOK_HANDLED; |
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| 865 | 1004 | #endif |
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| 866 | 1005 | return bug_handler(regs, esr) != DBG_HOOK_HANDLED; |
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| 867 | 1006 | } |
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| 868 | 1007 | |
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| 869 | | -/* This registration must happen early, before debug_traps_init(). */ |
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| 870 | 1008 | void __init trap_init(void) |
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| 871 | 1009 | { |
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| 872 | | - register_break_hook(&bug_break_hook); |
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| 1010 | + register_kernel_break_hook(&bug_break_hook); |
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| 1011 | + register_kernel_break_hook(&fault_break_hook); |
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| 873 | 1012 | #ifdef CONFIG_KASAN_SW_TAGS |
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| 874 | | - register_break_hook(&kasan_break_hook); |
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| 1013 | + register_kernel_break_hook(&kasan_break_hook); |
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| 875 | 1014 | #endif |
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| 1015 | + debug_traps_init(); |
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| 876 | 1016 | } |
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