forked from ~ljy/RK356X_SDK_RELEASE
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2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87 
 kernel/arch/arm64/boot/dts/rockchip/rk3528.dtsi
....@@ -220,9 +220,6 @@
220220 		rockchip,pvtm-temp-prop = <0 0>;
221221 		rockchip,pvtm-thermal-zone = "soc-thermal";
222222 		rockchip,grf = <&grf>;
223
-		rockchip,temp-hysteresis = <5000>;
224
-		rockchip,low-temp = <10000>;
225
-		rockchip,low-temp-min-volt = <900000>;
226223 
227224 		opp-408000000 {
228225 			opp-hz = /bits/ 64 <408000000>;
....@@ -452,21 +449,17 @@
452449 		compatible = "rockchip,mpp-service";
453450 		rockchip,taskqueue-count = <5>;
454451 		rockchip,resetgroup-count = <5>;
455
-		rockchip,grf = <&grf>;
456
-		rockchip,grf-mem-offset = <0x20010>, <0x40034>, <0x40034>,
457
-					  <0x600e0>, <0x600e0>;
458
-		rockchip,grf-mem-on-values =  <0x00000021>, <0x0f040000>, <0x0f040000>,
459
-					      <0xf0040000>, <0xf0040000>;
460
-		rockchip,grf-mem-off-values = <0xffff0021>, <0x0f040f04>, <0x0f040f04>,
461
-					      <0xf004f004>, <0xf004f004>;
462
-		rockchip,grf-names = "grf_rkvenc2", "grf_vdpu1", "grf_vdpu2",
463
-				     "grf_iep2", "grf_vdpp";
464452 		status = "disabled";
465453 	};
466454 
467455 	psci {
468456 		compatible = "arm,psci-1.0";
469457 		method = "smc";
458
+	};
459
+
460
+	rkvtunnel: rkvtunnel {
461
+		compatible = "rockchip,video-tunnel";
462
+		status = "disabled";
470463 	};
471464 
472465 	rockchip_suspend: rockchip-suspend {
....@@ -494,6 +487,12 @@
494487 		rockchip,temp-hysteresis = <5000>; /* millicelsius */
495488 		rockchip,offline-cpu-temp = <105000>; /* millicelsius */
496489 		rockchip,temp-offline-cpus = "2-3";
490
+	};
491
+
492
+	secure_otp: secure-otp {
493
+		compatible = "rockchip,secure-otp";
494
+		rockchip,otp-size = <32>;
495
+		status = "disabled";
497496 	};
498497 
499498 	thermal_zones: thermal-zones {
....@@ -645,12 +644,15 @@
645644 			resets = <&cru SRST_ARESETN_USB3OTG>;
646645 			reset-names = "usb3-otg";
647646 			snps,dis_enblslpm_quirk;
648
-			snps,dis-u1u2-quirk;
647
+			snps,dis-u1-entry-quirk;
648
+			snps,dis-u2-entry-quirk;
649649 			snps,dis-u2-freeclk-exists-quirk;
650650 			snps,dis-del-phy-power-chg-quirk;
651651 			snps,dis-tx-ipgap-linecheck-quirk;
652652 			snps,xhci-trb-ent-quirk;
653653 			snps,dis_rxdet_inp3_quirk;
654
+			snps,parkmode-disable-hs-quirk;
655
+			snps,parkmode-disable-ss-quirk;
654656 			quirk-skip-phy-init;
655657 			status = "disabled";
656658 		};
....@@ -810,7 +812,6 @@
810812 	qos_vdpp: qos@ff270480 {
811813 		compatible = "syscon";
812814 		reg = <0x0 0xff270480 0x0 0x20>;
813
-		priority-init = <0x202>;
814815 	};
815816 
816817 	qos_vop: qos@ff270500 {
....@@ -987,7 +988,6 @@
987988 			};
988989 			pd_vo@RK3528_PD_VO {
989990 				reg = <RK3528_PD_VO>;
990
-				pm_qos = <&qos_vdpp>;
991991 			};
992992 			pd_vpu@RK3528_PD_VPU {
993993 				reg = <RK3528_PD_VPU>;
....@@ -1073,9 +1073,6 @@
10731073 		rockchip,pvtm-temp-prop = <0 0>;
10741074 		rockchip,pvtm-thermal-zone = "soc-thermal";
10751075 		rockchip,grf = <&grf>;
1076
-		rockchip,temp-hysteresis = <5000>;
1077
-		rockchip,low-temp = <10000>;
1078
-		rockchip,low-temp-min-volt = <900000>;
10791076 
10801077 		opp-300000000 {
10811078 			opp-hz = /bits/ 64 <300000000>;
....@@ -1195,7 +1192,6 @@
11951192 		clock-names = "aclk", "iface", "clk_hevc_cabac";
11961193 		#iommu-cells = <0>;
11971194 		rockchip,shootdown-entire;
1198
-		rockchip,master-handle-irq;
11991195 		status = "disabled";
12001196 	};
12011197 
....@@ -1214,6 +1210,9 @@
12141210 		assigned-clock-rates = <300000000>, <300000000>;
12151211 		iommus = <&rkvenc_mmu>;
12161212 		rockchip,srv = <&mpp_srv>;
1213
+		rockchip,grf = <&grf>;
1214
+		rockchip,grf-mem-offset = <0x20010>;
1215
+		rockchip,grf-mem-values = <0x00000021>, <0xffff0021>;
12171216 		rockchip,taskqueue-node = <1>;
12181217 		rockchip,resetgroup-node = <1>;
12191218 		status = "disabled";
....@@ -1245,6 +1244,9 @@
12451244 		reset-names = "shared_video_a", "shared_video_h";
12461245 		iommus = <&vdpu_mmu>;
12471246 		rockchip,srv = <&mpp_srv>;
1247
+		rockchip,grf = <&grf>;
1248
+		rockchip,grf-mem-offset = <0x40034>;
1249
+		rockchip,grf-mem-values = <0x0f040000>, <0x0f040f04>;
12481250 		rockchip,taskqueue-node = <2>;
12491251 		rockchip,resetgroup-node = <2>;
12501252 		rockchip,disable-auto-freq;
....@@ -1400,7 +1402,6 @@
14001402 		clock-names = "aclk", "iface";
14011403 		#iommu-cells = <0>;
14021404 		rockchip,shootdown-entire;
1403
-		rockchip,disable-mmu-reset;
14041405 		status = "disabled";
14051406 	};
14061407 
....@@ -1418,6 +1419,9 @@
14181419 			 <&cru SRST_RESETN_CORE_VDPP>;
14191420 		reset-names = "shared_rst_a", "shared_rst_h", "shared_rst_s";
14201421 		rockchip,srv = <&mpp_srv>;
1422
+		rockchip,grf = <&grf>;
1423
+		rockchip,grf-mem-offset = <0x600e0>;
1424
+		rockchip,grf-mem-values = <0xf0040000>, <0xf004f004>;
14211425 		rockchip,taskqueue-node = <3>;
14221426 		rockchip,resetgroup-node = <3>;
14231427 		rockchip,disable-auto-freq;
....@@ -1522,14 +1526,13 @@
15221526 			 <&cru CLK_SFR_HDMI>,
15231527 			 <&cru CLK_CEC_HDMI>,
15241528 			 <&inno_hdmiphy_clk>;
1525
-		clock-names = "iahb", "isfr", "cec", "dclk_vop";
1529
+		clock-names = "iahb", "isfr", "cec", "dclk_vp0";
15261530 		ddc-i2c-scl-high-time-ns = <9625>;
15271531 		ddc-i2c-scl-low-time-ns = <10000>;
15281532 		reg-io-width = <4>;
15291533 		rockchip,grf = <&grf>;
1530
-		pinctrl-names = "default", "idle";
1534
+		pinctrl-names = "default";
15311535 		pinctrl-0 = <&hdmi_pins>;
1532
-		pinctrl-1 = <&hdmi_pins_idle>;
15331536 		phys = <&hdmiphy>;
15341537 		phy-names = "hdmi";
15351538 		#sound-dai-cells = <0>;
....@@ -1896,8 +1899,6 @@
18961899 		reg = <0x0 0xffac0000 0x0 0x100>;
18971900 		clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
18981901 		clock-names = "tclk", "pclk";
1899
-		resets = <&cru SRST_PRESETN_WDT_NS>;
1900
-		reset-names = "reset";
19011902 		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
19021903 		status = "disabled";
19031904 	};
....@@ -1917,6 +1918,8 @@
19171918 		rockchip,hw-tshut-temp = <120000>;
19181919 		rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
19191920 		rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
1921
+		nvmem-cells = <&cpu_tsadc_trim_l>, <&cpu_tsadc_trim_h>;
1922
+		nvmem-cell-names = "trim_l", "trim_h";
19201923 		status = "disabled";
19211924 	};
19221925 
....@@ -1938,13 +1941,10 @@
19381941 		interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
19391942 		clocks = <&cru MCLK_SAI_I2S3>, <&cru HCLK_SAI_I2S3>;
19401943 		clock-names = "mclk", "hclk";
1941
-		assigned-clocks = <&cru MCLK_SAI_I2S3>;
1942
-		assigned-clock-rates = <6144000>;
19431944 		dmas = <&dmac 5>;
19441945 		dma-names = "tx";
19451946 		resets = <&cru SRST_MRESETN_SAI_I2S3>, <&cru SRST_HRESETN_SAI_I2S3>;
19461947 		reset-names = "m", "h";
1947
-		rockchip,always-on;
19481948 		#sound-dai-cells = <0>;
19491949 		status = "disabled";
19501950 	};
....@@ -2320,6 +2320,12 @@
23202320 		dmc_opp_info: dmc-opp-info@3e {
23212321 			reg = <0x3e 0x6>;
23222322 		};
2323
+		cpu_tsadc_trim_l: cpu-tsadc-trim-l@44 {
2324
+			reg = <0x44 0x1>;
2325
+		};
2326
+		cpu_tsadc_trim_h: cpu-tsadc-trim-h@45 {
2327
+			reg = <0x45 0x1>;
2328
+		};
23232329 	};
23242330 
23252331 	dmac: dma-controller@ffd60000 {