enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
..
..
@@ -16,6 +16,14 @@
16
16
 	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
17
17
 	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
18
18
 
19
+	rk_headset: rk-headset {
20
+		compatible = "rockchip_headset";
21
+		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
23
+		pinctrl-names = "default";
24
+		pinctrl-0 = <&hp_det>;
25
+	};
26
+
19
27
 	vcc2v5_sys: vcc2v5-ddr {
20
28
 		compatible = "regulator-fixed";
21
29
 		regulator-name = "vcc2v5-sys";
..
..
@@ -61,7 +69,9 @@
61
69
 		regulator-name = "vcc3v3_pcie";
62
70
 		regulator-min-microvolt = <3300000>;
63
71
 		regulator-max-microvolt = <3300000>;
72
+		regulator-always-on;
64
73
 		enable-active-high;
74
+		regulator-boot-on;
65
75
 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
66
76
 		startup-delay-us = <5000>;
67
77
 		vin-supply = <&dc_12v>;
..
..
@@ -86,9 +96,8 @@
86
96
 		enable-active-high;
87
97
 		regulator-always-on;
88
98
 		regulator-boot-on;
89
-	};
99
+    	};
90
100
 #endif
91
-
92
101
 	ndj_io_init {
93
102
          	compatible = "nk_io_control";	
94
103
 			pinctrl-names = "default";
..
..
@@ -186,9 +195,28 @@
186
195
 				gpio_function = <1>;
187
196
 			};
188
197
 	#endif
189
-	};
190
-	
191
-			panel: panel {
198
+		};
199
+#if 0			
200
+	    nk_io_init {
201
+                compatible = "nk_io_control";
202
+//				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
203
+                hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
204
+                hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
205
+                vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
206
+                vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
207
+                en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
208
+                reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
209
+                air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
210
+                wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
211
+				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
212
+//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
213
+				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
214
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
215
+				pinctrl-names = "default";
216
+				pinctrl-0 = <&nk_io_gpio>;				
217
+        };
218
+#endif	
219
+		panel: panel {
192
220
 				compatible = "simple-panel";
193
221
 				backlight = <&backlight>;
194
222
 				power-supply = <&vcc3v3_lcd0_n>;
..
..
@@ -292,6 +320,10 @@
292
320
  * video_phy0 needs to be enabled
293
321
  * when dsi0 is enabled
294
322
  */
323
+&video_phy0 {
324
+	status = "disabled";
325
+};
326
+
295
327
 &dsi0 {
296
328
 	status = "disabled";
297
329
 };
..
..
@@ -312,6 +344,10 @@
312
344
  * video_phy1 needs to be enabled
313
345
  * when dsi1 is enabled
314
346
  */
347
+ 
348
+&video_phy1 {
349
+	status = "okay";
350
+}; 
315
351
 &dsi1 {
316
352
 	status = "disabled";
317
353
 };
..
..
@@ -321,15 +357,29 @@
321
357
 };
322
358
 
323
359
 &dsi1_in_vp1 {
324
-	status = "disabled";
360
+	status = "okay";
325
361
 };
326
362
 
327
363
 &dsi1_panel {
328
-	power-supply = <&vcc3v3_lcd1_n>;
364
+	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
365
+    vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
366
+    reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
367
+    vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
368
+    pinctrl-names = "default";
369
+    pinctrl-0 = <&lcd1_rst_gpio>;
329
370
 };
330
371
 
372
+&route_dsi1 {
373
+	status = "disabled";
374
+	connect = <&vp1_out_dsi1>;
375
+};
376
+
377
+
378
+/*
379
+*  edp_start
380
+*/
381
+
331
382
 &edp {
332
-	//hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;	
333
383
     force-hpd;
334
384
     status = "okay";
335
385
     ports {
..
..
@@ -348,18 +398,67 @@
348
398
 };
349
399
 
350
400
 &edp_in_vp0 {
351
-	status = "disabled";
401
+    status = "disabled";
352
402
 };
353
403
 
354
404
 &edp_in_vp1 {
405
+    status = "okay";
406
+
407
+};
408
+
409
+&route_edp {
410
+    status = "okay";
411
+    connect = <&vp1_out_edp>;
412
+};
413
+
414
+&route_edp {
355
415
 	status = "okay";
356
416
 };
417
+/*
418
+*  edp_end
419
+*/
420
+
421
+/*
422
+*  Hdmi_start
423
+*/
424
+
425
+&hdmi {
426
+	status = "okay";
427
+	rockchip,phy-table =
428
+		<92812500  0x8009 0x0000 0x0270>,
429
+		<165000000 0x800b 0x0000 0x026d>,
430
+		<185625000 0x800b 0x0000 0x01ed>,
431
+		<297000000 0x800b 0x0000 0x01ad>,
432
+		<594000000 0x8029 0x0000 0x0088>,
433
+		<000000000 0x0000 0x0000 0x0000>;
434
+};
435
+
436
+&route_hdmi {
437
+	status = "okay";
438
+	connect = <&vp0_out_hdmi>;
439
+};
440
+
441
+&hdmi_in_vp0 {
442
+	status = "okay";
443
+};
444
+
445
+&hdmi_in_vp1 {
446
+	status = "disabled";
447
+};
448
+
449
+&hdmi_sound {
450
+	status = "okay";
451
+};
452
+
453
+/*
454
+ *  Hdmi_END
455
+*/
357
456
 
358
457
 &gmac0 {
359
458
 	phy-mode = "rgmii";
360
459
 	clock_in_out = "output";
361
460
 
362
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
461
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
363
462
 	snps,reset-active-low;
364
463
 	/* Reset time is 20ms, 100ms for rtl8211f */
365
464
 	snps,reset-delays-us = <0 20000 100000>;
..
..
@@ -379,7 +478,9 @@
379
478
 	rx_delay = <0x2f>;
380
479
 
381
480
 	phy-handle = <&rgmii_phy0>;
481
+	
382
482
 	status = "disabled";
483
+	
383
484
 };
384
485
 
385
486
 &gmac1 {
..
..
@@ -444,7 +545,6 @@
444
545
 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
445
546
 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
446
547
 		rockchip,grf = <&grf>;
447
-		power-domains = <&power RK3568_PD_VI>;
448
548
 		rockchip,camera-module-index = <0>;
449
549
 		rockchip,camera-module-facing = "back";
450
550
 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..
..
@@ -501,6 +601,19 @@
501
601
 	};
502
602
 };
503
603
 
604
+&i2c5 {
605
+	status = "okay";
606
+
607
+	hym8563: hym8563@51 {
608
+		compatible = "haoyu,hym8563";
609
+		reg = <0x51>;
610
+		#clock-cells = <0>;
611
+		clock-frequency = <32768>;
612
+		clock-output-names = "xin32k";
613
+		/* rtc_int is not connected */
614
+	};
615
+};
616
+
504
617
 &mdio0 {
505
618
 	rgmii_phy0: phy@0 {
506
619
 		compatible = "ethernet-phy-ieee802.3-c22";
..
..
@@ -515,35 +628,36 @@
515
628
 	};
516
629
 };
517
630
 
518
-&video_phy0 {
519
-	status = "disabled";
520
-};
521
631
 
522
-&video_phy1 {
523
-	status = "disabled";
524
-};
525
632
 
526
633
 &pcie30phy {
527
634
 	status = "okay";
528
635
 };
529
636
 
530
-&pcie3x2 {
531
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
637
+&pcie2x1 {
638
+	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
532
639
 	vpcie3v3-supply = <&vcc3v3_pcie>;
533
640
 	status = "okay";
534
641
 };
535
642
 
536
643
 &pinctrl {
537
-
644
+//	cam {
645
+//		camera_pwr: camera-pwr {
646
+//			rockchip,pins =
647
+//				/* camera power en */
648
+//				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
649
+//		};
650
+//	};
538
651
 	headphone {
539
652
 		hp_det: hp-det {
540
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
653
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
654
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
541
655
 		};
542
656
 	};
543
657
 
544
658
 	wireless-wlan {
545
659
 		wifi_host_wake_irq: wifi-host-wake-irq {
546
-			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
660
+			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
547
661
 		};
548
662
 	};
549
663
 
..
..
@@ -553,6 +667,12 @@
553
667
 		};
554
668
 	};
555
669
 	
670
+	lcd1 {
671
+        lcd1_rst_gpio: lcd1-rst-gpio {
672
+            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
673
+        };
674
+    };
675
+		
556
676
 	nk_io_init{
557
677
 		nk_io_gpio: nk-io-gpio{
558
678
 			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -562,7 +682,7 @@
562
682
 							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
563
683
 							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
564
684
 							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
565
-							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 
685
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
566
686
 							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
567
687
 							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
568
688
 							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -578,10 +698,6 @@
578
698
 							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
579
699
 		};
580
700
 	};
581
-};
582
-
583
-&rk809_sound {
584
-	hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
585
701
 };
586
702
 
587
703
 &rkisp {
..
..
@@ -606,36 +722,30 @@
606
722
 	};
607
723
 };
608
724
 
609
-&route_dsi0 {
610
-	status = "disabled";
611
-	connect = <&vp1_out_dsi0>;
612
-};
613
725
 
614
-
615
-
616
-&route_edp {
617
-	status = "okay";
618
-	connect = <&vp1_out_edp>;
619
-};
620
726
 
621
727
 &sata2 {
622
728
 	status = "okay";
623
729
 };
624
730
 
625
731
 &sdmmc2 {
626
-	max-frequency = <150000000>;
627
-	supports-sdio;
628
-	bus-width = <4>;
629
-	disable-wp;
630
-	cap-sd-highspeed;
631
-	cap-sdio-irq;
632
-	keep-power-in-suspend;
633
-	mmc-pwrseq = <&sdio_pwrseq>;
634
-	non-removable;
635
-	pinctrl-names = "default";
636
-	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
637
-	sd-uhs-sdr104;
638
-	status = "okay";
732
+        status = "disabled";
733
+};
734
+
735
+&sdmmc1 {
736
+        max-frequency = <150000000>;
737
+        supports-sdio;
738
+        bus-width = <4>;
739
+        disable-wp;
740
+        cap-sd-highspeed;
741
+        cap-sdio-irq;
742
+        keep-power-in-suspend;
743
+        mmc-pwrseq = <&sdio_pwrseq>;
744
+        non-removable;
745
+        pinctrl-names = "default";
746
+        pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
747
+        sd-uhs-sdr104;
748
+        status = "okay";
639
749
 };
640
750
 
641
751
 &spdif_8ch {
..
..
@@ -676,8 +786,8 @@
676
786
 	pinctrl-0 = <&uart1m0_rtsn>;
677
787
 	pinctrl-1 = <&uart1_gpios>;
678
788
 	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
679
-	BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
680
-	BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
789
+    BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
790
+    BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
681
791
 	status = "okay";
682
792
 };
683
793
 
..
..
@@ -714,4 +824,4 @@
714
824
 &uart9 {
715
825
 	status = "okay";
716
826
 	pinctrl-0 = <&uart9m1_xfer>;
717
-};
827
+};