enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/arch/arm/mach-rockchip/platsmp.c
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@@ -1,16 +1,7 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Copyright (c) 2013 MundoReader S.L.
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  * Author: Heiko Stuebner <heiko@sntech.de>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #include <linux/delay.h>
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@@ -189,7 +180,7 @@
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 	rsize = resource_size(&res);
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 	if (rsize < trampoline_sz) {
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-		pr_err("%s: reserved block with size 0x%x is to small for trampoline size 0x%x\n",
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+		pr_err("%s: reserved block with size 0x%x is too small for trampoline size 0x%x\n",
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 		       __func__, rsize, trampoline_sz);
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 		return -EINVAL;
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 	}
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@@ -245,6 +236,7 @@
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 	}
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 	pmu_base = of_iomap(node, 0);
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+	of_node_put(node);
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 	if (!pmu_base) {
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 		pr_err("%s: could not map pmu registers\n", __func__);
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 		return -ENOMEM;
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@@ -277,19 +269,25 @@
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 	sram_base_addr = of_iomap(node, 0);
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 	if (!sram_base_addr) {
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 		pr_err("%s: could not map sram registers\n", __func__);
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+		of_node_put(node);
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 		return;
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 	}
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-	if (has_pmu && rockchip_smp_prepare_pmu())
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+	if (has_pmu && rockchip_smp_prepare_pmu()) {
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+		of_node_put(node);
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 		return;
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+	}
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 	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
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-		if (rockchip_smp_prepare_sram(node))
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+		if (rockchip_smp_prepare_sram(node)) {
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+			of_node_put(node);
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 			return;
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+		}
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 		/* enable the SCU power domain */
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 		pmu_set_power_domain(PMU_PWRDN_SCU, true);
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+		of_node_put(node);
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 		node = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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 		if (!node) {
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 			pr_err("%s: missing scu\n", __func__);
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@@ -299,6 +297,7 @@
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 		scu_base_addr = of_iomap(node, 0);
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 		if (!scu_base_addr) {
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 			pr_err("%s: could not map scu registers\n", __func__);
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+			of_node_put(node);
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 			return;
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 		}
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@@ -317,6 +316,7 @@
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 		asm ("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr));
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 		ncores = ((l2ctlr >> 24) & 0x3) + 1;
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 	}
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+	of_node_put(node);
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 	/* Make sure that all cores except the first are really off */
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 	for (i = 1; i < ncores; i++)