forked from ~ljy/RK356X_SDK_RELEASE
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2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87 
 kernel/arch/arm/mach-davinci/da830.c
....@@ -12,6 +12,8 @@
1212 #include <linux/clk/davinci.h>
1313 #include <linux/gpio.h>
1414 #include <linux/init.h>
15
+#include <linux/io.h>
16
+#include <linux/irqchip/irq-davinci-cp-intc.h>
1517 #include <linux/platform_data/gpio-davinci.h>
1618 
1719 #include <asm/mach/map.h>
....@@ -19,9 +21,10 @@
1921 #include <mach/common.h>
2022 #include <mach/cputype.h>
2123 #include <mach/da8xx.h>
22
-#include <mach/irqs.h>
23
-#include <mach/time.h>
2424 
25
+#include <clocksource/timer-davinci.h>
26
+
27
+#include "irqs.h"
2528 #include "mux.h"
2629 
2730 /* Offsets of the 8 compare registers on the da830 */
....@@ -623,101 +626,6 @@
623626 	-1
624627 };
625628 
626
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
627
-static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
628
-	[IRQ_DA8XX_COMMTX]		= 7,
629
-	[IRQ_DA8XX_COMMRX]		= 7,
630
-	[IRQ_DA8XX_NINT]		= 7,
631
-	[IRQ_DA8XX_EVTOUT0]		= 7,
632
-	[IRQ_DA8XX_EVTOUT1]		= 7,
633
-	[IRQ_DA8XX_EVTOUT2]		= 7,
634
-	[IRQ_DA8XX_EVTOUT3]		= 7,
635
-	[IRQ_DA8XX_EVTOUT4]		= 7,
636
-	[IRQ_DA8XX_EVTOUT5]		= 7,
637
-	[IRQ_DA8XX_EVTOUT6]		= 7,
638
-	[IRQ_DA8XX_EVTOUT7]		= 7,
639
-	[IRQ_DA8XX_CCINT0]		= 7,
640
-	[IRQ_DA8XX_CCERRINT]		= 7,
641
-	[IRQ_DA8XX_TCERRINT0]		= 7,
642
-	[IRQ_DA8XX_AEMIFINT]		= 7,
643
-	[IRQ_DA8XX_I2CINT0]		= 7,
644
-	[IRQ_DA8XX_MMCSDINT0]		= 7,
645
-	[IRQ_DA8XX_MMCSDINT1]		= 7,
646
-	[IRQ_DA8XX_ALLINT0]		= 7,
647
-	[IRQ_DA8XX_RTC]			= 7,
648
-	[IRQ_DA8XX_SPINT0]		= 7,
649
-	[IRQ_DA8XX_TINT12_0]		= 7,
650
-	[IRQ_DA8XX_TINT34_0]		= 7,
651
-	[IRQ_DA8XX_TINT12_1]		= 7,
652
-	[IRQ_DA8XX_TINT34_1]		= 7,
653
-	[IRQ_DA8XX_UARTINT0]		= 7,
654
-	[IRQ_DA8XX_KEYMGRINT]		= 7,
655
-	[IRQ_DA830_MPUERR]		= 7,
656
-	[IRQ_DA8XX_CHIPINT0]		= 7,
657
-	[IRQ_DA8XX_CHIPINT1]		= 7,
658
-	[IRQ_DA8XX_CHIPINT2]		= 7,
659
-	[IRQ_DA8XX_CHIPINT3]		= 7,
660
-	[IRQ_DA8XX_TCERRINT1]		= 7,
661
-	[IRQ_DA8XX_C0_RX_THRESH_PULSE]	= 7,
662
-	[IRQ_DA8XX_C0_RX_PULSE]		= 7,
663
-	[IRQ_DA8XX_C0_TX_PULSE]		= 7,
664
-	[IRQ_DA8XX_C0_MISC_PULSE]	= 7,
665
-	[IRQ_DA8XX_C1_RX_THRESH_PULSE]	= 7,
666
-	[IRQ_DA8XX_C1_RX_PULSE]		= 7,
667
-	[IRQ_DA8XX_C1_TX_PULSE]		= 7,
668
-	[IRQ_DA8XX_C1_MISC_PULSE]	= 7,
669
-	[IRQ_DA8XX_MEMERR]		= 7,
670
-	[IRQ_DA8XX_GPIO0]		= 7,
671
-	[IRQ_DA8XX_GPIO1]		= 7,
672
-	[IRQ_DA8XX_GPIO2]		= 7,
673
-	[IRQ_DA8XX_GPIO3]		= 7,
674
-	[IRQ_DA8XX_GPIO4]		= 7,
675
-	[IRQ_DA8XX_GPIO5]		= 7,
676
-	[IRQ_DA8XX_GPIO6]		= 7,
677
-	[IRQ_DA8XX_GPIO7]		= 7,
678
-	[IRQ_DA8XX_GPIO8]		= 7,
679
-	[IRQ_DA8XX_I2CINT1]		= 7,
680
-	[IRQ_DA8XX_LCDINT]		= 7,
681
-	[IRQ_DA8XX_UARTINT1]		= 7,
682
-	[IRQ_DA8XX_MCASPINT]		= 7,
683
-	[IRQ_DA8XX_ALLINT1]		= 7,
684
-	[IRQ_DA8XX_SPINT1]		= 7,
685
-	[IRQ_DA8XX_UHPI_INT1]		= 7,
686
-	[IRQ_DA8XX_USB_INT]		= 7,
687
-	[IRQ_DA8XX_IRQN]		= 7,
688
-	[IRQ_DA8XX_RWAKEUP]		= 7,
689
-	[IRQ_DA8XX_UARTINT2]		= 7,
690
-	[IRQ_DA8XX_DFTSSINT]		= 7,
691
-	[IRQ_DA8XX_EHRPWM0]		= 7,
692
-	[IRQ_DA8XX_EHRPWM0TZ]		= 7,
693
-	[IRQ_DA8XX_EHRPWM1]		= 7,
694
-	[IRQ_DA8XX_EHRPWM1TZ]		= 7,
695
-	[IRQ_DA830_EHRPWM2]		= 7,
696
-	[IRQ_DA830_EHRPWM2TZ]		= 7,
697
-	[IRQ_DA8XX_ECAP0]		= 7,
698
-	[IRQ_DA8XX_ECAP1]		= 7,
699
-	[IRQ_DA8XX_ECAP2]		= 7,
700
-	[IRQ_DA830_EQEP0]		= 7,
701
-	[IRQ_DA830_EQEP1]		= 7,
702
-	[IRQ_DA830_T12CMPINT0_0]	= 7,
703
-	[IRQ_DA830_T12CMPINT1_0]	= 7,
704
-	[IRQ_DA830_T12CMPINT2_0]	= 7,
705
-	[IRQ_DA830_T12CMPINT3_0]	= 7,
706
-	[IRQ_DA830_T12CMPINT4_0]	= 7,
707
-	[IRQ_DA830_T12CMPINT5_0]	= 7,
708
-	[IRQ_DA830_T12CMPINT6_0]	= 7,
709
-	[IRQ_DA830_T12CMPINT7_0]	= 7,
710
-	[IRQ_DA830_T12CMPINT0_1]	= 7,
711
-	[IRQ_DA830_T12CMPINT1_1]	= 7,
712
-	[IRQ_DA830_T12CMPINT2_1]	= 7,
713
-	[IRQ_DA830_T12CMPINT3_1]	= 7,
714
-	[IRQ_DA830_T12CMPINT4_1]	= 7,
715
-	[IRQ_DA830_T12CMPINT5_1]	= 7,
716
-	[IRQ_DA830_T12CMPINT6_1]	= 7,
717
-	[IRQ_DA830_T12CMPINT7_1]	= 7,
718
-	[IRQ_DA8XX_ARMCLKSTOPREQ]	= 7,
719
-};
720
-
721629 static struct map_desc da830_io_desc[] = {
722630 	{
723631 		.virtual	= IO_VIRT,
....@@ -759,7 +667,9 @@
759667 };
760668 
761669 static struct davinci_gpio_platform_data da830_gpio_platform_data = {
762
-	.ngpio = 128,
670
+	.no_auto_base	= true,
671
+	.base		= 0,
672
+	.ngpio		= 128,
763673 };
764674 
765675 int __init da830_register_gpio(void)
....@@ -767,32 +677,17 @@
767677 	return da8xx_register_gpio(&da830_gpio_platform_data);
768678 }
769679 
770
-static struct davinci_timer_instance da830_timer_instance[2] = {
771
-	{
772
-		.base		= DA8XX_TIMER64P0_BASE,
773
-		.bottom_irq	= IRQ_DA8XX_TINT12_0,
774
-		.top_irq	= IRQ_DA8XX_TINT34_0,
775
-		.cmp_off	= DA830_CMP12_0,
776
-		.cmp_irq	= IRQ_DA830_T12CMPINT0_0,
777
-	},
778
-	{
779
-		.base		= DA8XX_TIMER64P1_BASE,
780
-		.bottom_irq	= IRQ_DA8XX_TINT12_1,
781
-		.top_irq	= IRQ_DA8XX_TINT34_1,
782
-		.cmp_off	= DA830_CMP12_0,
783
-		.cmp_irq	= IRQ_DA830_T12CMPINT0_1,
784
-	},
785
-};
786
-
787680 /*
788
- * T0_BOT: Timer 0, bottom		: Used for clock_event & clocksource
789
- * T0_TOP: Timer 0, top			: Used by DSP
790
- * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
681
+ * Bottom half of timer0 is used both for clock even and clocksource.
682
+ * Top half is used by DSP.
791683  */
792
-static struct davinci_timer_info da830_timer_info = {
793
-	.timers		= da830_timer_instance,
794
-	.clockevent_id	= T0_BOT,
795
-	.clocksource_id	= T0_BOT,
684
+static const struct davinci_timer_cfg da830_timer_cfg = {
685
+	.reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
686
+	.irq = {
687
+		DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_0)),
688
+		DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)),
689
+	},
690
+	.cmp_off = DA830_CMP12_0,
796691 };
797692 
798693 static const struct davinci_soc_info davinci_soc_info_da830 = {
....@@ -804,11 +699,6 @@
804699 	.pinmux_base		= DA8XX_SYSCFG0_BASE + 0x120,
805700 	.pinmux_pins		= da830_pins,
806701 	.pinmux_pins_num	= ARRAY_SIZE(da830_pins),
807
-	.intc_base		= DA8XX_CP_INTC_BASE,
808
-	.intc_type		= DAVINCI_INTC_TYPE_CP_INTC,
809
-	.intc_irq_prios		= da830_default_priorities,
810
-	.intc_irq_num		= DA830_N_CP_INTC_IRQ,
811
-	.timer_info		= &da830_timer_info,
812702 	.emac_pdata		= &da8xx_emac_pdata,
813703 };
814704 
....@@ -820,10 +710,25 @@
820710 	WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
821711 }
822712 
713
+static const struct davinci_cp_intc_config da830_cp_intc_config = {
714
+	.reg = {
715
+		.start		= DA8XX_CP_INTC_BASE,
716
+		.end		= DA8XX_CP_INTC_BASE + SZ_8K - 1,
717
+		.flags		= IORESOURCE_MEM,
718
+	},
719
+	.num_irqs		= DA830_N_CP_INTC_IRQ,
720
+};
721
+
722
+void __init da830_init_irq(void)
723
+{
724
+	davinci_cp_intc_init(&da830_cp_intc_config);
725
+}
726
+
823727 void __init da830_init_time(void)
824728 {
825729 	void __iomem *pll;
826730 	struct clk *clk;
731
+	int rv;
827732 
828733 	clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ);
829734 
....@@ -832,8 +737,13 @@
832737 	da830_pll_init(NULL, pll, NULL);
833738 
834739 	clk = clk_get(NULL, "timer0");
740
+	if (WARN_ON(IS_ERR(clk))) {
741
+		pr_err("Unable to get the timer clock\n");
742
+		return;
743
+	}
835744 
836
-	davinci_timer_init(clk);
745
+	rv = davinci_timer_register(clk, &da830_timer_cfg);
746
+	WARN(rv, "Unable to register the timer: %d\n", rv);
837747 }
838748 
839749 static struct resource da830_psc0_resources[] = {