enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/arch/arm/boot/dts/am335x-baltos-ir2110.dts
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@@ -1,9 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
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  */
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 /*
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@@ -23,14 +20,20 @@
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 &am33xx_pinmux {
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 	uart1_pins: pinmux_uart1_pins {
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 		pinctrl-single,pins = <
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-			AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)      /* uart1_rxd */
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-			AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0)      /* uart1_txd */
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-			AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* uart1_ctsn */
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-			AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* uart1_rtsn */
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-			AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
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-			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
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-			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
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-			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
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+			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
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+			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
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+			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
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+			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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+			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
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+			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
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+			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
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+			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
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+		>;
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+	};
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+
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+	mmc1_pins: pinmux_mmc1_pins {
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+		pinctrl-single,pins = <
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+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE7)     /* MMC1 CD */
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 		>;
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 	};
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 };
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@@ -68,11 +71,13 @@
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 };
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 &cpsw_emac1 {
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-	phy-mode = "rgmii-txid";
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+	phy-mode = "rgmii-id";
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 	dual_emac_res_vlan = <2>;
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 	phy-handle = <&phy1>;
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 };
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-&phy_sel {
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-	rmii-clock-ext = <1>;
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+&mmc1 {
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&mmc1_pins>;
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+	cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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 };