enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/arch/arc/boot/dts/abilis_tb10x.dtsi
..
..
@@ -1,22 +1,10 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
1
2
 /*
2
3
  * Abilis Systems TB10X SOC device tree
3
4
  *
4
5
  * Copyright (C) Abilis Systems 2013
5
6
  *
6
7
  * Author: Christian Ruppert <christian.ruppert@abilis.com>
7
- *
8
- * This program is free software; you can redistribute it and/or modify
9
- * it under the terms of the GNU General Public License version 2 as
10
- * published by the Free Software Foundation.
11
- *
12
- * This program is distributed in the hope that it will be useful,
13
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
- * GNU General Public License for more details.
16
- *
17
- * You should have received a copy of the GNU General Public License
18
- * along with this program; if not, write to the Free Software
19
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
20
8
  */
21
9
 
22
10
 
..
..
@@ -54,7 +42,7 @@
54
42
 		#size-cells	= <1>;
55
43
 		device_type	= "soc";
56
44
 		ranges		= <0xfe000000 0xfe000000 0x02000000
57
-				0x000F0000 0x000F0000 0x00010000>;
45
+				0x000f0000 0x000f0000 0x00010000>;
58
46
 		compatible	= "abilis,tb10x", "simple-bus";
59
47
 
60
48
 		pll0: oscillator {
..
..
@@ -75,10 +63,10 @@
75
63
 			clock-output-names = "ahb_clk";
76
64
 		};
77
65
 
78
-		iomux: iomux@FF10601c {
66
+		iomux: iomux@ff10601c {
79
67
 			compatible = "abilis,tb10x-iomux";
80
68
 			#gpio-range-cells = <3>;
81
-			reg = <0xFF10601c 0x4>;
69
+			reg = <0xff10601c 0x4>;
82
70
 		};
83
71
 
84
72
 		intc: interrupt-controller {
..
..
@@ -88,7 +76,7 @@
88
76
 		};
89
77
 		tb10x_ictl: pic@fe002000 {
90
78
 			compatible = "abilis,tb10x-ictl";
91
-			reg = <0xFE002000 0x20>;
79
+			reg = <0xfe002000 0x20>;
92
80
 			interrupt-controller;
93
81
 			#interrupt-cells = <2>;
94
82
 			interrupt-parent = <&intc>;
..
..
@@ -96,27 +84,27 @@
96
84
 					20 21 22 23 24 25 26 27 28 29 30 31>;
97
85
 		};
98
86
 
99
-		uart@FF100000 {
87
+		uart@ff100000 {
100
88
 			compatible = "snps,dw-apb-uart";
101
-			reg = <0xFF100000 0x100>;
89
+			reg = <0xff100000 0x100>;
102
90
 			clock-frequency = <166666666>;
103
91
 			interrupts = <25 8>;
104
92
 			reg-shift = <2>;
105
93
 			reg-io-width = <4>;
106
94
 			interrupt-parent = <&tb10x_ictl>;
107
95
 		};
108
-		ethernet@FE100000 {
96
+		ethernet@fe100000 {
109
97
 			compatible = "snps,dwmac-3.70a","snps,dwmac";
110
-			reg = <0xFE100000 0x1058>;
98
+			reg = <0xfe100000 0x1058>;
111
99
 			interrupt-parent = <&tb10x_ictl>;
112
100
 			interrupts = <6 8>;
113
101
 			interrupt-names = "macirq";
114
102
 			clocks = <&ahb_clk>;
115
103
 			clock-names = "stmmaceth";
116
104
 		};
117
-		dma@FE000000 {
105
+		dma@fe000000 {
118
106
 			compatible = "snps,dma-spear1340";
119
-			reg = <0xFE000000 0x400>;
107
+			reg = <0xfe000000 0x400>;
120
108
 			interrupt-parent = <&tb10x_ictl>;
121
109
 			interrupts = <14 8>;
122
110
 			dma-channels = <6>;
..
..
@@ -132,70 +120,70 @@
132
120
 			multi-block = <1 1 1 1 1 1>;
133
121
 		};
134
122
 
135
-		i2c0: i2c@FF120000 {
123
+		i2c0: i2c@ff120000 {
136
124
 			#address-cells = <1>;
137
125
 			#size-cells = <0>;
138
126
 			compatible = "snps,designware-i2c";
139
-			reg = <0xFF120000 0x1000>;
127
+			reg = <0xff120000 0x1000>;
140
128
 			interrupt-parent = <&tb10x_ictl>;
141
129
 			interrupts = <12 8>;
142
130
 			clocks = <&ahb_clk>;
143
131
 		};
144
-		i2c1: i2c@FF121000 {
132
+		i2c1: i2c@ff121000 {
145
133
 			#address-cells = <1>;
146
134
 			#size-cells = <0>;
147
135
 			compatible = "snps,designware-i2c";
148
-			reg = <0xFF121000 0x1000>;
136
+			reg = <0xff121000 0x1000>;
149
137
 			interrupt-parent = <&tb10x_ictl>;
150
138
 			interrupts = <12 8>;
151
139
 			clocks = <&ahb_clk>;
152
140
 		};
153
-		i2c2: i2c@FF122000 {
141
+		i2c2: i2c@ff122000 {
154
142
 			#address-cells = <1>;
155
143
 			#size-cells = <0>;
156
144
 			compatible = "snps,designware-i2c";
157
-			reg = <0xFF122000 0x1000>;
145
+			reg = <0xff122000 0x1000>;
158
146
 			interrupt-parent = <&tb10x_ictl>;
159
147
 			interrupts = <12 8>;
160
148
 			clocks = <&ahb_clk>;
161
149
 		};
162
-		i2c3: i2c@FF123000 {
150
+		i2c3: i2c@ff123000 {
163
151
 			#address-cells = <1>;
164
152
 			#size-cells = <0>;
165
153
 			compatible = "snps,designware-i2c";
166
-			reg = <0xFF123000 0x1000>;
154
+			reg = <0xff123000 0x1000>;
167
155
 			interrupt-parent = <&tb10x_ictl>;
168
156
 			interrupts = <12 8>;
169
157
 			clocks = <&ahb_clk>;
170
158
 		};
171
-		i2c4: i2c@FF124000 {
159
+		i2c4: i2c@ff124000 {
172
160
 			#address-cells = <1>;
173
161
 			#size-cells = <0>;
174
162
 			compatible = "snps,designware-i2c";
175
-			reg = <0xFF124000 0x1000>;
163
+			reg = <0xff124000 0x1000>;
176
164
 			interrupt-parent = <&tb10x_ictl>;
177
165
 			interrupts = <12 8>;
178
166
 			clocks = <&ahb_clk>;
179
167
 		};
180
168
 
181
-		spi0: spi@0xFE010000 {
169
+		spi0: spi@fe010000 {
182
170
 			#address-cells = <1>;
183
171
 			#size-cells = <0>;
184
172
 			cell-index = <0>;
185
173
 			compatible = "abilis,tb100-spi";
186
174
 			num-cs = <1>;
187
-			reg = <0xFE010000 0x20>;
175
+			reg = <0xfe010000 0x20>;
188
176
 			interrupt-parent = <&tb10x_ictl>;
189
177
 			interrupts = <26 8>;
190
178
 			clocks = <&ahb_clk>;
191
179
 		};
192
-		spi1: spi@0xFE011000 {
180
+		spi1: spi@fe011000 {
193
181
 			#address-cells = <1>;
194
182
 			#size-cells = <0>;
195
183
 			cell-index = <1>;
196
184
 			compatible = "abilis,tb100-spi";
197
185
 			num-cs = <2>;
198
-			reg = <0xFE011000 0x20>;
186
+			reg = <0xfe011000 0x20>;
199
187
 			interrupt-parent = <&tb10x_ictl>;
200
188
 			interrupts = <10 8>;
201
189
 			clocks = <&ahb_clk>;
..
..
@@ -226,23 +214,23 @@
226
214
 			interrupts = <20 2>, <19 2>;
227
215
 			interrupt-names = "cmd_irq", "event_irq";
228
216
 		};
229
-		tb10x_mdsc0: tb10x-mdscr@FF300000 {
217
+		tb10x_mdsc0: tb10x-mdscr@ff300000 {
230
218
 			compatible = "abilis,tb100-mdscr";
231
-			reg = <0xFF300000 0x7000>;
219
+			reg = <0xff300000 0x7000>;
232
220
 			tb100-mdscr-manage-tsin;
233
221
 		};
234
-		tb10x_mscr0: tb10x-mdscr@FF307000 {
222
+		tb10x_mscr0: tb10x-mdscr@ff307000 {
235
223
 			compatible = "abilis,tb100-mdscr";
236
-			reg = <0xFF307000 0x7000>;
224
+			reg = <0xff307000 0x7000>;
237
225
 		};
238
226
 		tb10x_scr0: tb10x-mdscr@ff30e000 {
239
227
 			compatible = "abilis,tb100-mdscr";
240
-			reg = <0xFF30e000 0x4000>;
228
+			reg = <0xff30e000 0x4000>;
241
229
 			tb100-mdscr-manage-tsin;
242
230
 		};
243
231
 		tb10x_scr1: tb10x-mdscr@ff312000 {
244
232
 			compatible = "abilis,tb100-mdscr";
245
-			reg = <0xFF312000 0x4000>;
233
+			reg = <0xff312000 0x4000>;
246
234
 			tb100-mdscr-manage-tsin;
247
235
 		};
248
236
 		tb10x_wfb: tb10x-wfb@ff319000 {