AX88772C_eeprom and ax8872c build together

hc

2024-05-16 8d2a02b24d66aa359e83eebc1ed3c0f85367a1cb

 kernel/drivers/net/can/kvaser_pciefd.c
..
..
@@ -70,10 +70,12 @@
70
70
 #define KVASER_PCIEFD_SYSID_BUILD_REG (KVASER_PCIEFD_SYSID_BASE + 0x14)
71
71
 /* Shared receive buffer registers */
72
72
 #define KVASER_PCIEFD_SRB_BASE 0x1f200
73
+#define KVASER_PCIEFD_SRB_FIFO_LAST_REG (KVASER_PCIEFD_SRB_BASE + 0x1f4)
73
74
 #define KVASER_PCIEFD_SRB_CMD_REG (KVASER_PCIEFD_SRB_BASE + 0x200)
74
75
 #define KVASER_PCIEFD_SRB_IEN_REG (KVASER_PCIEFD_SRB_BASE + 0x204)
75
76
 #define KVASER_PCIEFD_SRB_IRQ_REG (KVASER_PCIEFD_SRB_BASE + 0x20c)
76
77
 #define KVASER_PCIEFD_SRB_STAT_REG (KVASER_PCIEFD_SRB_BASE + 0x210)
78
+#define KVASER_PCIEFD_SRB_RX_NR_PACKETS_REG (KVASER_PCIEFD_SRB_BASE + 0x214)
77
79
 #define KVASER_PCIEFD_SRB_CTRL_REG (KVASER_PCIEFD_SRB_BASE + 0x218)
78
80
 /* EPCS flash controller registers */
79
81
 #define KVASER_PCIEFD_SPI_BASE 0x1fc00
..
..
@@ -109,6 +111,9 @@
109
111
 #define KVASER_PCIEFD_SRB_STAT_DI BIT(15)
110
112
 /* DMA support */
111
113
 #define KVASER_PCIEFD_SRB_STAT_DMA BIT(24)
114
+
115
+/* SRB current packet level */
116
+#define KVASER_PCIEFD_SRB_RX_NR_PACKETS_MASK 0xff
112
117
 
113
118
 /* DMA Enable */
114
119
 #define KVASER_PCIEFD_SRB_CTRL_DMA_ENABLE BIT(0)
..
..
@@ -528,7 +533,7 @@
528
533
 	      KVASER_PCIEFD_KCAN_IRQ_TOF | KVASER_PCIEFD_KCAN_IRQ_ABD |
529
534
 	      KVASER_PCIEFD_KCAN_IRQ_TAE | KVASER_PCIEFD_KCAN_IRQ_TAL |
530
535
 	      KVASER_PCIEFD_KCAN_IRQ_FDIC | KVASER_PCIEFD_KCAN_IRQ_BPP |
531
-	      KVASER_PCIEFD_KCAN_IRQ_TAR | KVASER_PCIEFD_KCAN_IRQ_TFD;
536
+	      KVASER_PCIEFD_KCAN_IRQ_TAR;
532
537
 
533
538
 	iowrite32(msk, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
534
539
 
..
..
@@ -556,6 +561,8 @@
556
561
 
557
562
 	if (can->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
558
563
 		mode |= KVASER_PCIEFD_KCAN_MODE_LOM;
564
+	else
565
+		mode &= ~KVASER_PCIEFD_KCAN_MODE_LOM;
559
566
 
560
567
 	mode |= KVASER_PCIEFD_KCAN_MODE_EEN;
561
568
 	mode |= KVASER_PCIEFD_KCAN_MODE_EPEN;
..
..
@@ -574,7 +581,7 @@
574
581
 
575
582
 	spin_lock_irqsave(&can->lock, irq);
576
583
 	iowrite32(-1, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
577
-	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD | KVASER_PCIEFD_KCAN_IRQ_TFD,
584
+	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,
578
585
 		  can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
579
586
 
580
587
 	status = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_STAT_REG);
..
..
@@ -617,7 +624,7 @@
617
624
 	iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
618
625
 	iowrite32(-1, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
619
626
 
620
-	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD | KVASER_PCIEFD_KCAN_IRQ_TFD,
627
+	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,
621
628
 		  can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
622
629
 
623
630
 	mode = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG);
..
..
@@ -721,6 +728,7 @@
721
728
 		iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
722
729
 		del_timer(&can->bec_poll_timer);
723
730
 	}
731
+	can->can.state = CAN_STATE_STOPPED;
724
732
 	close_candev(netdev);
725
733
 
726
734
 	return ret;
..
..
@@ -1003,8 +1011,7 @@
1003
1011
 		SET_NETDEV_DEV(netdev, &pcie->pci->dev);
1004
1012
 
1005
1013
 		iowrite32(-1, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
1006
-		iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD |
1007
-			  KVASER_PCIEFD_KCAN_IRQ_TFD,
1014
+		iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,
1008
1015
 			  can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
1009
1016
 
1010
1017
 		pcie->can[i] = can;
..
..
@@ -1054,6 +1061,7 @@
1054
1061
 {
1055
1062
 	int i;
1056
1063
 	u32 srb_status;
1064
+	u32 srb_packet_count;
1057
1065
 	dma_addr_t dma_addr[KVASER_PCIEFD_DMA_COUNT];
1058
1066
 
1059
1067
 	/* Disable the DMA */
..
..
@@ -1080,6 +1088,15 @@
1080
1088
 	iowrite32(KVASER_PCIEFD_SRB_CMD_FOR | KVASER_PCIEFD_SRB_CMD_RDB0 |
1081
1089
 		  KVASER_PCIEFD_SRB_CMD_RDB1,
1082
1090
 		  pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG);
1091
+
1092
+	/* Empty Rx FIFO */
1093
+	srb_packet_count = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_RX_NR_PACKETS_REG) &
1094
+			   KVASER_PCIEFD_SRB_RX_NR_PACKETS_MASK;
1095
+	while (srb_packet_count) {
1096
+		/* Drop current packet in FIFO */
1097
+		ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_FIFO_LAST_REG);
1098
+		srb_packet_count--;
1099
+	}
1083
1100
 
1084
1101
 	srb_status = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_STAT_REG);
1085
1102
 	if (!(srb_status & KVASER_PCIEFD_SRB_STAT_DI)) {
..
..
@@ -1423,9 +1440,6 @@
1423
1440
 		cmd = KVASER_PCIEFD_KCAN_CMD_AT;
1424
1441
 		cmd |= ++can->cmd_seq << KVASER_PCIEFD_KCAN_CMD_SEQ_SHIFT;
1425
1442
 		iowrite32(cmd, can->reg_base + KVASER_PCIEFD_KCAN_CMD_REG);
1426
-
1427
-		iowrite32(KVASER_PCIEFD_KCAN_IRQ_TFD,
1428
-			  can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
1429
1443
 	} else if (p->header[0] & KVASER_PCIEFD_SPACK_IDET &&
1430
1444
 		   p->header[0] & KVASER_PCIEFD_SPACK_IRM &&
1431
1445
 		   cmdseq == (p->header[1] & KVASER_PCIEFD_PACKET_SEQ_MSK) &&
..
..
@@ -1714,15 +1728,6 @@
1714
1728
 	if (irq & KVASER_PCIEFD_KCAN_IRQ_TOF)
1715
1729
 		netdev_err(can->can.dev, "Tx FIFO overflow\n");
1716
1730
 
1717
-	if (irq & KVASER_PCIEFD_KCAN_IRQ_TFD) {
1718
-		u8 count = ioread32(can->reg_base +
1719
-				    KVASER_PCIEFD_KCAN_TX_NPACKETS_REG) & 0xff;
1720
-
1721
-		if (count == 0)
1722
-			iowrite32(KVASER_PCIEFD_KCAN_CTRL_EFLUSH,
1723
-				  can->reg_base + KVASER_PCIEFD_KCAN_CTRL_REG);
1724
-	}
1725
-
1726
1731
 	if (irq & KVASER_PCIEFD_KCAN_IRQ_BPP)
1727
1732
 		netdev_err(can->can.dev,
1728
1733
 			   "Fail to change bittiming, when not in reset mode\n");
..
..
@@ -1824,6 +1829,11 @@
1824
1829
 	if (err)
1825
1830
 		goto err_teardown_can_ctrls;
1826
1831
 
1832
+	err = request_irq(pcie->pci->irq, kvaser_pciefd_irq_handler,
1833
+			  IRQF_SHARED, KVASER_PCIEFD_DRV_NAME, pcie);
1834
+	if (err)
1835
+		goto err_teardown_can_ctrls;
1836
+
1827
1837
 	iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1,
1828
1838
 		  pcie->reg_base + KVASER_PCIEFD_SRB_IRQ_REG);
1829
1839
 
..
..
@@ -1844,11 +1854,6 @@
1844
1854
 	iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1,
1845
1855
 		  pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG);
1846
1856
 
1847
-	err = request_irq(pcie->pci->irq, kvaser_pciefd_irq_handler,
1848
-			  IRQF_SHARED, KVASER_PCIEFD_DRV_NAME, pcie);
1849
-	if (err)
1850
-		goto err_teardown_can_ctrls;
1851
-
1852
1857
 	err = kvaser_pciefd_reg_candev(pcie);
1853
1858
 	if (err)
1854
1859
 		goto err_free_irq;
..
..
@@ -1856,6 +1861,8 @@
1856
1861
 	return 0;
1857
1862
 
1858
1863
 err_free_irq:
1864
+	/* Disable PCI interrupts */
1865
+	iowrite32(0, pcie->reg_base + KVASER_PCIEFD_IEN_REG);
1859
1866
 	free_irq(pcie->pci->irq, pcie);
1860
1867
 
1861
1868
 err_teardown_can_ctrls: