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2024-05-16 8d2a02b24d66aa359e83eebc1ed3c0f85367a1cb

 kernel/drivers/gpu/arm/bifrost/mali_kbase_ctx_sched.c
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@@ -1,7 +1,7 @@
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 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
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 /*
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  *
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- * (C) COPYRIGHT 2017-2021 ARM Limited. All rights reserved.
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+ * (C) COPYRIGHT 2017-2023 ARM Limited. All rights reserved.
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  *
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  * This program is free software and is provided to you under the terms of the
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  * GNU General Public License version 2 as published by the Free Software
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@@ -23,6 +23,11 @@
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 #include <mali_kbase_defs.h>
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 #include "mali_kbase_ctx_sched.h"
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 #include "tl/mali_kbase_tracepoints.h"
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+#if MALI_USE_CSF
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+#include "mali_kbase_reset_gpu.h"
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+#else
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+#include <mali_kbase_hwaccess_jm.h>
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+#endif
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 /* Helper for ktrace */
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 #if KBASE_KTRACE_ENABLE
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@@ -62,6 +67,12 @@
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 		WARN_ON(kbdev->as_to_kctx[i] != NULL);
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 		WARN_ON(!(kbdev->as_free & (1u << i)));
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 	}
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+}
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+
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+void kbase_ctx_sched_init_ctx(struct kbase_context *kctx)
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+{
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+	kctx->as_nr = KBASEP_AS_NR_INVALID;
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+	atomic_set(&kctx->refcount, 0);
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 }
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 /* kbasep_ctx_sched_find_as_for_ctx - Find a free address space
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@@ -108,7 +119,7 @@
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 	if (atomic_inc_return(&kctx->refcount) == 1) {
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 		int const free_as = kbasep_ctx_sched_find_as_for_ctx(kctx);
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-		if (free_as != KBASEP_AS_NR_INVALID) {
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+		if (free_as >= 0) {
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 			kbdev->as_free &= ~(1u << free_as);
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 			/* Only program the MMU if the context has not been
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 			 * assigned the same address space before.
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@@ -124,7 +135,6 @@
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 						kbdev, prev_kctx->id);
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 					prev_kctx->as_nr = KBASEP_AS_NR_INVALID;
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 				}
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-
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 				kctx->as_nr = free_as;
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 				kbdev->as_to_kctx[free_as] = kctx;
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 				KBASE_TLSTREAM_TL_KBASE_CTX_ASSIGN_AS(
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@@ -150,9 +160,23 @@
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 	struct kbase_device *const kbdev = kctx->kbdev;
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 	lockdep_assert_held(&kbdev->hwaccess_lock);
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-	WARN_ON(atomic_read(&kctx->refcount) == 0);
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-	WARN_ON(kctx->as_nr == KBASEP_AS_NR_INVALID);
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-	WARN_ON(kbdev->as_to_kctx[kctx->as_nr] != kctx);
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+#if MALI_USE_CSF
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+	/* We expect the context to be active when this function is called,
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+	 * except for the case where a page fault is reported for it during
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+	 * the GPU reset sequence, in which case we can expect the refcount
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+	 * to be 0.
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+	 */
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+	WARN_ON(!atomic_read(&kctx->refcount) && !kbase_reset_gpu_is_active(kbdev));
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+#else
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+	/* We expect the context to be active (and thus refcount should be non-zero)
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+         * when this function is called
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+         */
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+	WARN_ON(!atomic_read(&kctx->refcount));
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+#endif
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+	if (likely((kctx->as_nr >= 0) && (kctx->as_nr < BASE_MAX_NR_AS)))
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+		WARN_ON(kbdev->as_to_kctx[kctx->as_nr] != kctx);
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+	else
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+		WARN(true, "Invalid as_nr(%d)", kctx->as_nr);
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 	atomic_inc(&kctx->refcount);
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 }
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@@ -166,13 +190,17 @@
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 	new_ref_count = atomic_dec_return(&kctx->refcount);
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 	if (new_ref_count == 0) {
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-		kbdev->as_free |= (1u << kctx->as_nr);
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-		if (kbase_ctx_flag(kctx, KCTX_AS_DISABLED_ON_FAULT)) {
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-			KBASE_TLSTREAM_TL_KBASE_CTX_UNASSIGN_AS(
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-				kbdev, kctx->id);
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-			kbdev->as_to_kctx[kctx->as_nr] = NULL;
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-			kctx->as_nr = KBASEP_AS_NR_INVALID;
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-			kbase_ctx_flag_clear(kctx, KCTX_AS_DISABLED_ON_FAULT);
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+		if (likely((kctx->as_nr >= 0) && (kctx->as_nr < BASE_MAX_NR_AS))) {
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+			kbdev->as_free |= (1u << kctx->as_nr);
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+			if (kbase_ctx_flag(kctx, KCTX_AS_DISABLED_ON_FAULT)) {
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+				KBASE_TLSTREAM_TL_KBASE_CTX_UNASSIGN_AS(kbdev, kctx->id);
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+				kbdev->as_to_kctx[kctx->as_nr] = NULL;
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+				kctx->as_nr = KBASEP_AS_NR_INVALID;
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+				kbase_ctx_flag_clear(kctx, KCTX_AS_DISABLED_ON_FAULT);
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+#if !MALI_USE_CSF
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+				kbase_backend_slot_kctx_purge_locked(kbdev, kctx);
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+#endif
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+			}
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 		}
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 	}
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@@ -182,13 +210,14 @@
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 void kbase_ctx_sched_remove_ctx(struct kbase_context *kctx)
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 {
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 	struct kbase_device *const kbdev = kctx->kbdev;
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+	unsigned long flags;
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-	lockdep_assert_held(&kbdev->mmu_hw_mutex);
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-	lockdep_assert_held(&kbdev->hwaccess_lock);
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+	mutex_lock(&kbdev->mmu_hw_mutex);
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+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
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 	WARN_ON(atomic_read(&kctx->refcount) != 0);
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-	if (kctx->as_nr != KBASEP_AS_NR_INVALID) {
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+	if ((kctx->as_nr >= 0) && (kctx->as_nr < BASE_MAX_NR_AS)) {
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 		if (kbdev->pm.backend.gpu_powered)
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 			kbase_mmu_disable(kctx);
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@@ -196,6 +225,9 @@
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 		kbdev->as_to_kctx[kctx->as_nr] = NULL;
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 		kctx->as_nr = KBASEP_AS_NR_INVALID;
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 	}
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+
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+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
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+	mutex_unlock(&kbdev->mmu_hw_mutex);
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 }
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 void kbase_ctx_sched_restore_all_as(struct kbase_device *kbdev)
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@@ -210,6 +242,7 @@
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 	for (i = 0; i != kbdev->nr_hw_address_spaces; ++i) {
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 		struct kbase_context *kctx;
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+		kbdev->as[i].is_unresponsive = false;
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 #if MALI_USE_CSF
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 		if ((i == MCU_AS_NR) && kbdev->csf.firmware_inited) {
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 			kbase_mmu_update(kbdev, &kbdev->csf.mcu_mmu,
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@@ -308,16 +341,14 @@
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 bool kbase_ctx_sched_inc_refcount_nolock(struct kbase_context *kctx)
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 {
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 	bool result = false;
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-	int as_nr;
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 	if (WARN_ON(kctx == NULL))
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 		return result;
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 	lockdep_assert_held(&kctx->kbdev->hwaccess_lock);
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-	as_nr = kctx->as_nr;
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 	if (atomic_read(&kctx->refcount) > 0) {
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-		KBASE_DEBUG_ASSERT(as_nr >= 0);
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+		KBASE_DEBUG_ASSERT(kctx->as_nr >= 0);
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 		kbase_ctx_sched_retain_ctx_refcount(kctx);
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 		KBASE_KTRACE_ADD(kctx->kbdev, SCHED_RETAIN_CTX_NOLOCK, kctx,