hc
2024-05-16 8d2a02b24d66aa359e83eebc1ed3c0f85367a1cb
kernel/drivers/gpu/arm/bifrost/csf/mali_kbase_csf_tl_reader.c
....@@ -1,7 +1,7 @@
11 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
22 /*
33 *
4
- * (C) COPYRIGHT 2019-2021 ARM Limited. All rights reserved.
4
+ * (C) COPYRIGHT 2019-2023 ARM Limited. All rights reserved.
55 *
66 * This program is free software and is provided to you under the terms of the
77 * GNU General Public License version 2 as published by the Free Software
....@@ -31,17 +31,11 @@
3131 #include "mali_kbase_pm.h"
3232 #include "mali_kbase_hwaccess_time.h"
3333
34
-#include <linux/gcd.h>
3534 #include <linux/math64.h>
36
-#include <asm/arch_timer.h>
3735
3836 #if IS_ENABLED(CONFIG_DEBUG_FS)
3937 #include "tl/mali_kbase_timeline_priv.h"
4038 #include <linux/debugfs.h>
41
-
42
-#if (KERNEL_VERSION(4, 7, 0) > LINUX_VERSION_CODE)
43
-#define DEFINE_DEBUGFS_ATTRIBUTE DEFINE_SIMPLE_ATTRIBUTE
44
-#endif
4539 #endif
4640
4741 /* Name of the CSFFW timeline tracebuffer. */
....@@ -80,9 +74,8 @@
8074 struct kbase_device *kbdev = (struct kbase_device *)data;
8175 struct kbase_csf_tl_reader *self = &kbdev->timeline->csf_tl_reader;
8276
83
- if (val > KBASE_CSF_TL_READ_INTERVAL_MAX || val < KBASE_CSF_TL_READ_INTERVAL_MIN) {
77
+ if (val > KBASE_CSF_TL_READ_INTERVAL_MAX || val < KBASE_CSF_TL_READ_INTERVAL_MIN)
8478 return -EINVAL;
85
- }
8679
8780 self->timer_interval = (u32)val;
8881
....@@ -93,92 +86,13 @@
9386 kbase_csf_tl_debugfs_poll_interval_read,
9487 kbase_csf_tl_debugfs_poll_interval_write, "%llu\n");
9588
96
-
9789 void kbase_csf_tl_reader_debugfs_init(struct kbase_device *kbdev)
9890 {
99
- debugfs_create_file("csf_tl_poll_interval_in_ms", S_IRUGO | S_IWUSR,
91
+ debugfs_create_file("csf_tl_poll_interval_in_ms", 0644,
10092 kbdev->debugfs_instr_directory, kbdev,
10193 &kbase_csf_tl_poll_interval_fops);
102
-
10394 }
10495 #endif
105
-
106
-/**
107
- * get_cpu_gpu_time() - Get current CPU and GPU timestamps.
108
- *
109
- * @kbdev: Kbase device.
110
- * @cpu_ts: Output CPU timestamp.
111
- * @gpu_ts: Output GPU timestamp.
112
- * @gpu_cycle: Output GPU cycle counts.
113
- */
114
-static void get_cpu_gpu_time(
115
- struct kbase_device *kbdev,
116
- u64 *cpu_ts,
117
- u64 *gpu_ts,
118
- u64 *gpu_cycle)
119
-{
120
- struct timespec64 ts;
121
-
122
- kbase_pm_context_active(kbdev);
123
- kbase_backend_get_gpu_time(kbdev, gpu_cycle, gpu_ts, &ts);
124
- kbase_pm_context_idle(kbdev);
125
-
126
- if (cpu_ts)
127
- *cpu_ts = ts.tv_sec * NSEC_PER_SEC + ts.tv_nsec;
128
-}
129
-
130
-
131
-/**
132
- * kbase_ts_converter_init() - Initialize system timestamp converter.
133
- *
134
- * @self: System Timestamp Converter instance.
135
- * @kbdev: Kbase device pointer
136
- *
137
- * Return: Zero on success, -1 otherwise.
138
- */
139
-static int kbase_ts_converter_init(
140
- struct kbase_ts_converter *self,
141
- struct kbase_device *kbdev)
142
-{
143
- u64 cpu_ts = 0;
144
- u64 gpu_ts = 0;
145
- u64 freq;
146
- u64 common_factor;
147
-
148
- get_cpu_gpu_time(kbdev, &cpu_ts, &gpu_ts, NULL);
149
- freq = arch_timer_get_cntfrq();
150
-
151
- if (!freq) {
152
- dev_warn(kbdev->dev, "arch_timer_get_rate() is zero!");
153
- return -1;
154
- }
155
-
156
- common_factor = gcd(NSEC_PER_SEC, freq);
157
-
158
- self->multiplier = div64_u64(NSEC_PER_SEC, common_factor);
159
- self->divisor = div64_u64(freq, common_factor);
160
- self->offset =
161
- cpu_ts - div64_u64(gpu_ts * self->multiplier, self->divisor);
162
-
163
- return 0;
164
-}
165
-
166
-/**
167
- * kbase_ts_converter_convert() - Convert GPU timestamp to CPU timestamp.
168
- *
169
- * @self: System Timestamp Converter instance.
170
- * @gpu_ts: System timestamp value to converter.
171
- *
172
- * Return: The CPU timestamp.
173
- */
174
-static void kbase_ts_converter_convert(
175
- const struct kbase_ts_converter *self,
176
- u64 *gpu_ts)
177
-{
178
- u64 old_gpu_ts = *gpu_ts;
179
- *gpu_ts = div64_u64(old_gpu_ts * self->multiplier,
180
- self->divisor) + self->offset;
181
-}
18296
18397 /**
18498 * tl_reader_overflow_notify() - Emit stream overflow tracepoint.
....@@ -301,7 +215,7 @@
301215 dev_warn(
302216 kbdev->dev,
303217 "Unable to parse CSFFW tracebuffer event header.");
304
- ret = -EBUSY;
218
+ ret = -EBUSY;
305219 break;
306220 }
307221
....@@ -322,7 +236,7 @@
322236 dev_warn(kbdev->dev,
323237 "event_id: %u, can't read with event_size: %u.",
324238 event_id, event_size);
325
- ret = -EBUSY;
239
+ ret = -EBUSY;
326240 break;
327241 }
328242
....@@ -330,9 +244,8 @@
330244 {
331245 struct kbase_csffw_tl_message *msg =
332246 (struct kbase_csffw_tl_message *) csffw_data_it;
333
- kbase_ts_converter_convert(
334
- &self->ts_converter,
335
- &msg->timestamp);
247
+ msg->timestamp =
248
+ kbase_backend_time_convert_gpu_to_cpu(kbdev, msg->timestamp);
336249 }
337250
338251 /* Copy the message out to the tl_stream. */
....@@ -406,10 +319,6 @@
406319 return -1;
407320 }
408321
409
- if (kbase_ts_converter_init(&self->ts_converter, kbdev)) {
410
- return -1;
411
- }
412
-
413322 self->kbdev = kbdev;
414323 self->trace_buffer = tb;
415324 self->tl_header.data = hdr;
....@@ -477,7 +386,14 @@
477386 return 0;
478387
479388 if (tl_reader_init_late(self, kbdev)) {
389
+#if IS_ENABLED(CONFIG_MALI_BIFROST_NO_MALI)
390
+ dev_warn(
391
+ kbdev->dev,
392
+ "CSFFW timeline is not available for MALI_BIFROST_NO_MALI builds!");
393
+ return 0;
394
+#else
480395 return -EINVAL;
396
+#endif
481397 }
482398
483399 tl_reader_reset(self);
....@@ -521,14 +437,5 @@
521437
522438 void kbase_csf_tl_reader_reset(struct kbase_csf_tl_reader *self)
523439 {
524
- u64 gpu_cycle = 0;
525
- struct kbase_device *kbdev = self->kbdev;
526
-
527
- if (!kbdev)
528
- return;
529
-
530440 kbase_csf_tl_reader_flush_buffer(self);
531
-
532
- get_cpu_gpu_time(kbdev, NULL, NULL, &gpu_cycle);
533
- KBASE_TLSTREAM_TL_KBASE_CSFFW_RESET(kbdev, gpu_cycle);
534441 }