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2024-05-16 8d2a02b24d66aa359e83eebc1ed3c0f85367a1cb

 kernel/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_gpuprops_backend.c
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@@ -1,7 +1,7 @@
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 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
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 /*
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  *
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- * (C) COPYRIGHT 2014-2021 ARM Limited. All rights reserved.
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+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
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  *
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  * This program is free software and is provided to you under the terms of the
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  * GNU General Public License version 2 as published by the Free Software
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@@ -26,32 +26,21 @@
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 #include <mali_kbase.h>
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 #include <device/mali_kbase_device.h>
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 #include <backend/gpu/mali_kbase_pm_internal.h>
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+#include <backend/gpu/mali_kbase_cache_policy_backend.h>
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 #include <mali_kbase_hwaccess_gpuprops.h>
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 int kbase_backend_gpuprops_get(struct kbase_device *kbdev,
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 					struct kbase_gpuprops_regdump *regdump)
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 {
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 	int i;
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-	struct kbase_gpuprops_regdump registers;
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+	struct kbase_gpuprops_regdump registers = { 0 };
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 	/* Fill regdump with the content of the relevant registers */
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 	registers.gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID));
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 	registers.l2_features = kbase_reg_read(kbdev,
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 				GPU_CONTROL_REG(L2_FEATURES));
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-	registers.core_features = 0;
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-#if !MALI_USE_CSF
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-	/* TGOx */
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-	registers.core_features = kbase_reg_read(kbdev,
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-				GPU_CONTROL_REG(CORE_FEATURES));
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-#else /* !MALI_USE_CSF */
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-	if (((registers.gpu_id & GPU_ID2_PRODUCT_MODEL) ==
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-	     GPU_ID2_PRODUCT_TGRX) ||
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-	    ((registers.gpu_id & GPU_ID2_PRODUCT_MODEL) ==
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-	     GPU_ID2_PRODUCT_TVAX))
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-		registers.core_features =
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-			kbase_reg_read(kbdev, GPU_CONTROL_REG(CORE_FEATURES));
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-#endif /* MALI_USE_CSF */
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+
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 	registers.tiler_features = kbase_reg_read(kbdev,
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 				GPU_CONTROL_REG(TILER_FEATURES));
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 	registers.mem_features = kbase_reg_read(kbdev,
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@@ -146,7 +135,7 @@
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 	curr_config_regdump->l2_present_hi = kbase_reg_read(kbdev,
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 					GPU_CONTROL_REG(L2_PRESENT_HI));
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-	if (WARN_ON(kbase_is_gpu_removed(kbdev)))
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+	if (kbase_is_gpu_removed(kbdev))
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 		return -EIO;
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 	return 0;
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@@ -156,30 +145,27 @@
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 int kbase_backend_gpuprops_get_features(struct kbase_device *kbdev,
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 					struct kbase_gpuprops_regdump *regdump)
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 {
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-	if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_COHERENCY_REG)) {
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-		u32 coherency_features;
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+	u32 coherency_features;
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+	int error = 0;
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-		/* Ensure we can access the GPU registers */
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-		kbase_pm_register_access_enable(kbdev);
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+	/* Ensure we can access the GPU registers */
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+	kbase_pm_register_access_enable(kbdev);
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-		coherency_features = kbase_reg_read(kbdev,
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-				GPU_CONTROL_REG(COHERENCY_FEATURES));
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+	coherency_features = kbase_cache_get_coherency_features(kbdev);
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-		if (kbase_is_gpu_removed(kbdev))
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-			return -EIO;
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+	if (kbase_is_gpu_removed(kbdev))
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+		error = -EIO;
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-		regdump->coherency_features = coherency_features;
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+	regdump->coherency_features = coherency_features;
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-		/* We're done accessing the GPU registers for now. */
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-		kbase_pm_register_access_disable(kbdev);
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-	} else {
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-		/* Pre COHERENCY_FEATURES we only supported ACE_LITE */
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-		regdump->coherency_features =
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-				COHERENCY_FEATURE_BIT(COHERENCY_NONE) |
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-				COHERENCY_FEATURE_BIT(COHERENCY_ACE_LITE);
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-	}
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+	if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_CORE_FEATURES))
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+		regdump->core_features = kbase_reg_read(kbdev, GPU_CONTROL_REG(CORE_FEATURES));
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+	else
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+		regdump->core_features = 0;
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-	return 0;
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+	kbase_pm_register_access_disable(kbdev);
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+
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+	return error;
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 }
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 int kbase_backend_gpuprops_get_l2_features(struct kbase_device *kbdev,
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@@ -190,13 +176,24 @@
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 				GPU_CONTROL_REG(L2_FEATURES));
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 		u32 l2_config =
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 			kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG));
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+		u32 asn_hash[ASN_HASH_COUNT] = {
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+			0,
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+		};
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+		int i;
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+		if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_ASN_HASH)) {
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+			for (i = 0; i < ASN_HASH_COUNT; i++)
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+				asn_hash[i] = kbase_reg_read(
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+					kbdev, GPU_CONTROL_REG(ASN_HASH(i)));
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+		}
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 		if (kbase_is_gpu_removed(kbdev))
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 			return -EIO;
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 		regdump->l2_features = l2_features;
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 		regdump->l2_config = l2_config;
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+		for (i = 0; i < ASN_HASH_COUNT; i++)
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+			regdump->l2_asn_hash[i] = asn_hash[i];
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 	}
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 	return 0;