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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2011-2016 Zhang, Keguang <keguang.zhang@gmail.com> |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify it |
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5 | | - * under the terms of the GNU General Public License as published by the |
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6 | | - * Free Software Foundation; either version 2 of the License, or (at your |
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7 | | - * option) any later version. |
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8 | 4 | */ |
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9 | 5 | |
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10 | 6 | #include <linux/clk.h> |
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.. | .. |
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81 | 77 | }, |
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82 | 78 | }; |
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83 | 79 | |
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84 | | -/* DMA */ |
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85 | | -static struct resource ls1x_dma_resources[] = { |
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86 | | - [0] = { |
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87 | | - .start = LS1X_DMAC_BASE, |
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88 | | - .end = LS1X_DMAC_BASE + SZ_4 - 1, |
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89 | | - .flags = IORESOURCE_MEM, |
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90 | | - }, |
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91 | | - [1] = { |
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92 | | - .start = LS1X_DMA0_IRQ, |
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93 | | - .end = LS1X_DMA0_IRQ, |
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94 | | - .flags = IORESOURCE_IRQ, |
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95 | | - }, |
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96 | | - [2] = { |
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97 | | - .start = LS1X_DMA1_IRQ, |
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98 | | - .end = LS1X_DMA1_IRQ, |
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99 | | - .flags = IORESOURCE_IRQ, |
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100 | | - }, |
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101 | | - [3] = { |
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102 | | - .start = LS1X_DMA2_IRQ, |
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103 | | - .end = LS1X_DMA2_IRQ, |
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104 | | - .flags = IORESOURCE_IRQ, |
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105 | | - }, |
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106 | | -}; |
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107 | | - |
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108 | | -struct platform_device ls1x_dma_pdev = { |
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109 | | - .name = "ls1x-dma", |
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110 | | - .id = -1, |
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111 | | - .num_resources = ARRAY_SIZE(ls1x_dma_resources), |
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112 | | - .resource = ls1x_dma_resources, |
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113 | | -}; |
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114 | | - |
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115 | | -void __init ls1x_dma_set_platdata(struct plat_ls1x_dma *pdata) |
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116 | | -{ |
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117 | | - ls1x_dma_pdev.dev.platform_data = pdata; |
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118 | | -} |
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119 | | - |
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120 | 80 | /* Synopsys Ethernet GMAC */ |
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121 | 81 | static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = { |
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122 | 82 | .phy_mask = 0, |
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.. | .. |
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138 | 98 | if (plat_dat->bus_id) { |
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139 | 99 | __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 | |
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140 | 100 | GMAC1_USE_UART0, LS1X_MUX_CTRL0); |
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141 | | - switch (plat_dat->interface) { |
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| 101 | + switch (plat_dat->phy_interface) { |
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142 | 102 | case PHY_INTERFACE_MODE_RGMII: |
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143 | 103 | val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23); |
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144 | 104 | break; |
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.. | .. |
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147 | 107 | break; |
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148 | 108 | default: |
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149 | 109 | pr_err("unsupported mii mode %d\n", |
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150 | | - plat_dat->interface); |
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| 110 | + plat_dat->phy_interface); |
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151 | 111 | return -ENOTSUPP; |
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152 | 112 | } |
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153 | 113 | val &= ~GMAC1_SHUT; |
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154 | 114 | } else { |
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155 | | - switch (plat_dat->interface) { |
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| 115 | + switch (plat_dat->phy_interface) { |
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156 | 116 | case PHY_INTERFACE_MODE_RGMII: |
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157 | 117 | val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01); |
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158 | 118 | break; |
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.. | .. |
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161 | 121 | break; |
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162 | 122 | default: |
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163 | 123 | pr_err("unsupported mii mode %d\n", |
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164 | | - plat_dat->interface); |
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| 124 | + plat_dat->phy_interface); |
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165 | 125 | return -ENOTSUPP; |
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166 | 126 | } |
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167 | 127 | val &= ~GMAC0_SHUT; |
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.. | .. |
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171 | 131 | plat_dat = dev_get_platdata(&pdev->dev); |
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172 | 132 | |
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173 | 133 | val &= ~PHY_INTF_SELI; |
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174 | | - if (plat_dat->interface == PHY_INTERFACE_MODE_RMII) |
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| 134 | + if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII) |
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175 | 135 | val |= 0x4 << PHY_INTF_SELI_SHIFT; |
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176 | 136 | __raw_writel(val, LS1X_MUX_CTRL1); |
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177 | 137 | |
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.. | .. |
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186 | 146 | .bus_id = 0, |
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187 | 147 | .phy_addr = -1, |
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188 | 148 | #if defined(CONFIG_LOONGSON1_LS1B) |
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189 | | - .interface = PHY_INTERFACE_MODE_MII, |
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| 149 | + .phy_interface = PHY_INTERFACE_MODE_MII, |
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190 | 150 | #elif defined(CONFIG_LOONGSON1_LS1C) |
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191 | | - .interface = PHY_INTERFACE_MODE_RMII, |
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| 151 | + .phy_interface = PHY_INTERFACE_MODE_RMII, |
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192 | 152 | #endif |
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193 | 153 | .mdio_bus_data = &ls1x_mdio_bus_data, |
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194 | 154 | .dma_cfg = &ls1x_eth_dma_cfg, |
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.. | .. |
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226 | 186 | static struct plat_stmmacenet_data ls1x_eth1_pdata = { |
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227 | 187 | .bus_id = 1, |
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228 | 188 | .phy_addr = -1, |
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229 | | - .interface = PHY_INTERFACE_MODE_MII, |
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| 189 | + .phy_interface = PHY_INTERFACE_MODE_MII, |
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230 | 190 | .mdio_bus_data = &ls1x_mdio_bus_data, |
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231 | 191 | .dma_cfg = &ls1x_eth_dma_cfg, |
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232 | 192 | .has_gmac = 1, |
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.. | .. |
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290 | 250 | .num_resources = ARRAY_SIZE(ls1x_gpio1_resources), |
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291 | 251 | .resource = ls1x_gpio1_resources, |
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292 | 252 | }; |
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293 | | - |
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294 | | -/* NAND Flash */ |
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295 | | -static struct resource ls1x_nand_resources[] = { |
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296 | | - [0] = { |
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297 | | - .start = LS1X_NAND_BASE, |
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298 | | - .end = LS1X_NAND_BASE + SZ_32 - 1, |
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299 | | - .flags = IORESOURCE_MEM, |
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300 | | - }, |
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301 | | - [1] = { |
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302 | | - /* DMA channel 0 is dedicated to NAND */ |
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303 | | - .start = LS1X_DMA_CHANNEL0, |
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304 | | - .end = LS1X_DMA_CHANNEL0, |
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305 | | - .flags = IORESOURCE_DMA, |
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306 | | - }, |
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307 | | -}; |
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308 | | - |
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309 | | -struct platform_device ls1x_nand_pdev = { |
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310 | | - .name = "ls1x-nand", |
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311 | | - .id = -1, |
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312 | | - .num_resources = ARRAY_SIZE(ls1x_nand_resources), |
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313 | | - .resource = ls1x_nand_resources, |
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314 | | -}; |
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315 | | - |
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316 | | -void __init ls1x_nand_set_platdata(struct plat_ls1x_nand *pdata) |
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317 | | -{ |
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318 | | - ls1x_nand_pdev.dev.platform_data = pdata; |
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319 | | -} |
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320 | 253 | |
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321 | 254 | /* USB EHCI */ |
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322 | 255 | static u64 ls1x_ehci_dmamask = DMA_BIT_MASK(32); |
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