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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> |
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3 | 4 | * Copyright (c) 2009 Wu Zhangjin <wuzhangjin@gmail.com> |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it |
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6 | | - * and/or modify it under the terms of the GNU General |
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7 | | - * Public License as published by the Free Software |
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8 | | - * Foundation; either version 2 of the License, or (at your |
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9 | | - * option) any later version. |
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10 | 5 | */ |
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11 | 6 | |
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12 | 7 | #ifndef __ASM_MACH_LOONGSON64_PCI_H_ |
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.. | .. |
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17 | 12 | /* this is an offset from mips_io_port_base */ |
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18 | 13 | #define LOONGSON_PCI_IO_START 0x00004000UL |
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19 | 14 | |
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20 | | -#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG |
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21 | | - |
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22 | | -/* |
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23 | | - * we use address window2 to map cpu address space to pci space |
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24 | | - * window2: cpu [1G, 2G] -> pci [1G, 2G] |
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25 | | - * why not use window 0 & 1? because they are used by cpu when booting. |
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26 | | - * window0: cpu [0, 256M] -> ddr [0, 256M] |
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27 | | - * window1: cpu [256M, 512M] -> pci [256M, 512M] |
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28 | | - */ |
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29 | | - |
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30 | | -/* the smallest LOONGSON_CPU_MEM_SRC can be 512M */ |
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31 | | -#define LOONGSON_CPU_MEM_SRC 0x40000000ul /* 1G */ |
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32 | | -#define LOONGSON_PCI_MEM_DST LOONGSON_CPU_MEM_SRC |
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33 | | - |
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34 | | -#define LOONGSON_PCI_MEM_START LOONGSON_PCI_MEM_DST |
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35 | | -#define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */ |
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36 | | - |
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37 | | -#define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \ |
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38 | | - LOONGSON_PCI_MEM_START + 1) |
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39 | | - |
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40 | | -#else /* loongson2f/32bit & loongson2e */ |
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41 | | - |
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42 | | -/* this pci memory space is mapped by pcimap in pci.c */ |
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43 | | -#ifdef CONFIG_CPU_LOONGSON3 |
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44 | 15 | #define LOONGSON_PCI_MEM_START 0x40000000UL |
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45 | 16 | #define LOONGSON_PCI_MEM_END 0x7effffffUL |
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46 | | -#else |
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47 | | -#define LOONGSON_PCI_MEM_START LOONGSON_PCILO1_BASE |
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48 | | -#define LOONGSON_PCI_MEM_END (LOONGSON_PCILO1_BASE + 0x04000000 * 2) |
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49 | | -#endif |
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50 | | -/* this is an offset from mips_io_port_base */ |
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51 | | -#define LOONGSON_PCI_IO_START 0x00004000UL |
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52 | 17 | |
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53 | | -#endif /* !CONFIG_CPU_SUPPORTS_ADDRWINCFG */ |
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54 | 18 | |
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55 | 19 | #endif /* !__ASM_MACH_LOONGSON64_PCI_H_ */ |
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