hc
2024-05-16 8d2a02b24d66aa359e83eebc1ed3c0f85367a1cb
kernel/arch/mips/include/asm/local.h
....@@ -31,17 +31,19 @@
3131 {
3232 unsigned long result;
3333
34
- if (kernel_uses_llsc && R10000_LLSC_WAR) {
34
+ if (kernel_uses_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) {
3535 unsigned long temp;
3636
3737 __asm__ __volatile__(
38
+ " .set push \n"
3839 " .set arch=r4000 \n"
40
+ __SYNC(full, loongson3_war) " \n"
3941 "1:" __LL "%1, %2 # local_add_return \n"
4042 " addu %0, %1, %3 \n"
4143 __SC "%0, %2 \n"
4244 " beqzl %0, 1b \n"
4345 " addu %0, %1, %3 \n"
44
- " .set mips0 \n"
46
+ " .set pop \n"
4547 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
4648 : "Ir" (i), "m" (l->a.counter)
4749 : "memory");
....@@ -49,13 +51,15 @@
4951 unsigned long temp;
5052
5153 __asm__ __volatile__(
54
+ " .set push \n"
5255 " .set "MIPS_ISA_ARCH_LEVEL" \n"
56
+ __SYNC(full, loongson3_war) " \n"
5357 "1:" __LL "%1, %2 # local_add_return \n"
5458 " addu %0, %1, %3 \n"
5559 __SC "%0, %2 \n"
5660 " beqz %0, 1b \n"
5761 " addu %0, %1, %3 \n"
58
- " .set mips0 \n"
62
+ " .set pop \n"
5963 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
6064 : "Ir" (i), "m" (l->a.counter)
6165 : "memory");
....@@ -76,17 +80,19 @@
7680 {
7781 unsigned long result;
7882
79
- if (kernel_uses_llsc && R10000_LLSC_WAR) {
83
+ if (kernel_uses_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) {
8084 unsigned long temp;
8185
8286 __asm__ __volatile__(
87
+ " .set push \n"
8388 " .set arch=r4000 \n"
89
+ __SYNC(full, loongson3_war) " \n"
8490 "1:" __LL "%1, %2 # local_sub_return \n"
8591 " subu %0, %1, %3 \n"
8692 __SC "%0, %2 \n"
8793 " beqzl %0, 1b \n"
8894 " subu %0, %1, %3 \n"
89
- " .set mips0 \n"
95
+ " .set pop \n"
9096 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
9197 : "Ir" (i), "m" (l->a.counter)
9298 : "memory");
....@@ -94,13 +100,15 @@
94100 unsigned long temp;
95101
96102 __asm__ __volatile__(
103
+ " .set push \n"
97104 " .set "MIPS_ISA_ARCH_LEVEL" \n"
105
+ __SYNC(full, loongson3_war) " \n"
98106 "1:" __LL "%1, %2 # local_sub_return \n"
99107 " subu %0, %1, %3 \n"
100108 __SC "%0, %2 \n"
101109 " beqz %0, 1b \n"
102110 " subu %0, %1, %3 \n"
103
- " .set mips0 \n"
111
+ " .set pop \n"
104112 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
105113 : "Ir" (i), "m" (l->a.counter)
106114 : "memory");