AX88772C_eeprom and ax8872c build together

hc

2024-05-16 8d2a02b24d66aa359e83eebc1ed3c0f85367a1cb

 kernel/arch/arm64/include/asm/cacheflush.h
..
..
@@ -1,20 +1,9 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
1
2
 /*
2
3
  * Based on arch/arm/include/asm/cacheflush.h
3
4
  *
4
5
  * Copyright (C) 1999-2002 Russell King.
5
6
  * Copyright (C) 2012 ARM Ltd.
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
10
- *
11
- * This program is distributed in the hope that it will be useful,
12
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
- * GNU General Public License for more details.
15
- *
16
- * You should have received a copy of the GNU General Public License
17
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18
7
  */
19
8
 #ifndef __ASM_CACHEFLUSH_H
20
9
 #define __ASM_CACHEFLUSH_H
..
..
@@ -40,10 +29,6 @@
40
29
  *	See Documentation/core-api/cachetlb.rst for more information. Please note that
41
30
  *	the implementation assumes non-aliasing VIPT D-cache and (aliasing)
42
31
  *	VIPT I-cache.
43
- *
44
- *	flush_cache_all()
45
- *
46
- *		Unconditionally clean and invalidate the entire cache.
47
32
  *
48
33
  *	flush_cache_mm(mm)
49
34
  *
..
..
@@ -76,10 +61,8 @@
76
61
  *		- kaddr  - page address
77
62
  *		- size   - region size
78
63
  */
79
-extern void flush_cache_all(void);
80
64
 extern void __flush_icache_range(unsigned long start, unsigned long end);
81
65
 extern int  invalidate_icache_range(unsigned long start, unsigned long end);
82
-extern void __flush_dcache_all(void);
83
66
 extern void __flush_dcache_area(void *addr, size_t len);
84
67
 extern void __inval_dcache_area(void *addr, size_t len);
85
68
 extern void __clean_dcache_area_poc(void *addr, size_t len);
..
..
@@ -111,20 +94,7 @@
111
94
 
112
95
 	kick_all_cpus_sync();
113
96
 }
114
-
115
-static inline void flush_cache_mm(struct mm_struct *mm)
116
-{
117
-}
118
-
119
-static inline void flush_cache_page(struct vm_area_struct *vma,
120
-				    unsigned long user_addr, unsigned long pfn)
121
-{
122
-}
123
-
124
-static inline void flush_cache_range(struct vm_area_struct *vma,
125
-				     unsigned long start, unsigned long end)
126
-{
127
-}
97
+#define flush_icache_range flush_icache_range
128
98
 
129
99
 /*
130
100
  * Cache maintenance functions used by the DMA API. No to be used directly.
..
..
@@ -132,15 +102,6 @@
132
102
 extern void __dma_map_area(const void *, size_t, int);
133
103
 extern void __dma_unmap_area(const void *, size_t, int);
134
104
 extern void __dma_flush_area(const void *, size_t);
135
-extern void __dma_inv_area(const void *start, size_t size);
136
-extern void __dma_clean_area(const void *start, size_t size);
137
-
138
-#define dmac_flush_range(start, end) \
139
-	__dma_flush_area(start, (void *)(end) - (void *)(start))
140
-#define dmac_inv_range(start, end) \
141
-	__dma_inv_area(start, (void *)(end) - (void *)(start))
142
-#define dmac_clean_range(start, end) \
143
-	__dma_clean_area(start, (void *)(end) - (void *)(start))
144
105
 
145
106
 /*
146
107
  * Copy user data from/to a page which is mapped into a different
..
..
@@ -149,12 +110,7 @@
149
110
  */
150
111
 extern void copy_to_user_page(struct vm_area_struct *, struct page *,
151
112
 	unsigned long, void *, const void *, unsigned long);
152
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
153
-	do {							\
154
-		memcpy(dst, src, len);				\
155
-	} while (0)
156
-
157
-#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
113
+#define copy_to_user_page copy_to_user_page
158
114
 
159
115
 /*
160
116
  * flush_dcache_page is used when the kernel has written to the page
..
..
@@ -171,7 +127,7 @@
171
127
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
172
128
 extern void flush_dcache_page(struct page *);
173
129
 
174
-static inline void __flush_icache_all(void)
130
+static __always_inline void __flush_icache_all(void)
175
131
 {
176
132
 	if (cpus_have_const_cap(ARM64_HAS_CACHE_DIC))
177
133
 		return;
..
..
@@ -180,26 +136,11 @@
180
136
 	dsb(ish);
181
137
 }
182
138
 
183
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
184
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
185
-
186
-/*
187
- * We don't appear to need to do anything here.  In fact, if we did, we'd
188
- * duplicate cache flushing elsewhere performed by flush_dcache_page().
189
- */
190
-#define flush_icache_page(vma,page)	do { } while (0)
191
-
192
-/*
193
- * Not required on AArch64 (PIPT or VIPT non-aliasing D-cache).
194
- */
195
-static inline void flush_cache_vmap(unsigned long start, unsigned long end)
196
-{
197
-}
198
-
199
-static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
200
-{
201
-}
202
-
203
139
 int set_memory_valid(unsigned long addr, int numpages, int enable);
204
140
 
205
-#endif
141
+int set_direct_map_invalid_noflush(struct page *page);
142
+int set_direct_map_default_noflush(struct page *page);
143
+
144
+#include <asm-generic/cacheflush.h>
145
+
146
+#endif /* __ASM_CACHEFLUSH_H */