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2024-05-16 8d2a02b24d66aa359e83eebc1ed3c0f85367a1cb 
 kernel/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
....@@ -1,49 +1,6 @@
1
-/*
2
- * Copyright 2015 Armadeus Systems
3
- *
4
- * This file is dual-licensed: you can use it either under the terms
5
- * of the GPL or the X11 license, at your option. Note that this dual
6
- * licensing only applies to this file, and not this project as a
7
- * whole.
8
- *
9
- *  a) This file is free software; you can redistribute it and/or
10
- *     modify it under the terms of the GNU General Public License as
11
- *     published by the Free Software Foundation; either version 2 of
12
- *     the License, or (at your option) any later version.
13
- *
14
- *     This file is distributed in the hope that it will be useful,
15
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- *     GNU General Public License for more details.
18
- *
19
- *     You should have received a copy of the GNU General Public
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- *     License along with this file; if not, write to the Free
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- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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- *     MA 02110-1301 USA
23
- *
24
- * Or, alternatively,
25
- *
26
- *  b) Permission is hereby granted, free of charge, to any person
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- *     obtaining a copy of this software and associated documentation
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- *     files (the "Software"), to deal in the Software without
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- *     restriction, including without limitation the rights to use,
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- *     copy, modify, merge, publish, distribute, sublicense, and/or
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- *     sell copies of the Software, and to permit persons to whom the
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- *     Software is furnished to do so, subject to the following
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- *     conditions:
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- *
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- *     The above copyright notice and this permission notice shall be
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- *     included in all copies or substantial portions of the Software.
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- *
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- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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- *     OTHER DEALINGS IN THE SOFTWARE.
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- */
1
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
2
+//
3
+// Copyright 2015 Armadeus Systems <support@armadeus.com>
474 
485 #include <dt-bindings/gpio/gpio.h>
496 #include <dt-bindings/input/input.h>
....@@ -54,33 +11,35 @@
5411 		stdout-path = &uart4;
5512 	};
5613 
14
+	backlight: backlight {
15
+		compatible = "pwm-backlight";
16
+		pwms = <&pwm3 0 191000>;
17
+		brightness-levels = <0 4 8 16 32 64 128 255>;
18
+		default-brightness-level = <0>;
19
+		power-supply = <&reg_5v>;
20
+	};
21
+
5722 	disp0 {
5823 		compatible = "fsl,imx-parallel-display";
59
-		interface-pix-fmt = "bgr666";
6024 		pinctrl-names = "default";
61
-		pinctrl-0 = <&pinctrl_ipu1_disp1>;
25
+		pinctrl-0 = <&pinctrl_ipu1_disp0>;
6226 
63
-		display-timings {
64
-			lw700 {
65
-				clock-frequency = <33000033>;
66
-				hactive = <800>;
67
-				vactive = <480>;
68
-				hback-porch = <96>;
69
-				hfront-porch = <96>;
70
-				vback-porch = <20>;
71
-				vfront-porch = <21>;
72
-				hsync-len = <64>;
73
-				vsync-len = <4>;
74
-				hsync-active = <1>;
75
-				vsync-active = <1>;
76
-				de-active = <1>;
77
-				pixelclk-active = <1>;
27
+		#address-cells = <1>;
28
+		#size-cells = <0>;
29
+
30
+		port@0 {
31
+			reg = <0>;
32
+
33
+			display_in: endpoint {
34
+				remote-endpoint = <&ipu1_di0_disp0>;
7835 			};
7936 		};
8037 
81
-		port {
82
-			display_in: endpoint {
83
-				remote-endpoint = <&ipu1_di0_disp0>;
38
+		port@1 {
39
+			reg = <1>;
40
+
41
+			display_out: endpoint {
42
+				remote-endpoint = <&panel_in>;
8443 			};
8544 		};
8645 	};
....@@ -111,17 +70,30 @@
11170 		};
11271 	};
11372 
73
+	panel {
74
+		compatible = "armadeus,st0700-adapt";
75
+		power-supply = <&reg_3p3v>;
76
+		backlight = <&backlight>;
77
+
78
+		port {
79
+			panel_in: endpoint {
80
+				remote-endpoint = <&display_out>;
81
+			};
82
+		};
83
+	};
84
+
11485 	reg_3p3v: regulator-3p3v {
11586 		compatible = "regulator-fixed";
11687 		regulator-name = "3P3V";
11788 		regulator-min-microvolt = <3300000>;
11889 		regulator-max-microvolt = <3300000>;
11990 		regulator-always-on;
91
+		vin-supply = <&reg_5v>;
12092 	};
12193 
122
-	reg_usbh1_vbus: regulator-usb-h1-vbus {
94
+	reg_5v: regulator-5v {
12395 		compatible = "regulator-fixed";
124
-		regulator-name = "usb_h1_vbus";
96
+		regulator-name = "5V";
12597 		regulator-min-microvolt = <5000000>;
12698 		regulator-max-microvolt = <5000000>;
12799 		regulator-always-on;
....@@ -166,6 +138,7 @@
166138 &can2 {
167139 	pinctrl-names = "default";
168140 	pinctrl-0 = <&pinctrl_flexcan2>;
141
+	xceiver-supply = <&reg_5v>;
169142 	status = "okay";
170143 };
171144 
....@@ -212,6 +185,11 @@
212185 		VDDA-supply = <&reg_3p3v>;
213186 		VDDIO-supply = <&reg_3p3v>;
214187 	};
188
+
189
+	rtc@6f {
190
+		compatible = "microchip,mcp7940x";
191
+		reg = <0x6f>;
192
+	};
215193 };
216194 
217195 &i2c3 {
....@@ -233,6 +211,7 @@
233211 };
234212 
235213 &pwm3 {
214
+	#pwm-cells = <2>;
236215 	pinctrl-names = "default";
237216 	pinctrl-0 = <&pinctrl_pwm3>;
238217 	status = "okay";
....@@ -261,7 +240,7 @@
261240 };
262241 
263242 &usbh1 {
264
-	vbus-supply = <&reg_usbh1_vbus>;
243
+	vbus-supply = <&reg_5v>;
265244 	phy_type = "utmi";
266245 	status = "okay";
267246 };
....@@ -297,178 +276,176 @@
297276 	pinctrl-names = "default";
298277 	pinctrl-0 = <&pinctrl_gpios>;
299278 
300
-	apf6dev {
301
-		pinctrl_audmux: audmuxgrp {
302
-			fsl,pins = <
303
-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
304
-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0
305
-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
306
-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0
307
-				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
308
-			>;
309
-		};
279
+	pinctrl_audmux: audmuxgrp {
280
+		fsl,pins = <
281
+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
282
+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0
283
+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
284
+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0
285
+			MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
286
+		>;
287
+	};
310288 
311
-		pinctrl_ecspi1: ecspi1grp {
312
-			fsl,pins = <
313
-				MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
314
-				MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
315
-				MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
316
-				MX6QDL_PAD_KEY_ROW1__GPIO4_IO09  0x1b0b0
317
-				MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
318
-				MX6QDL_PAD_KEY_COL2__GPIO4_IO10  0x1b0b0
319
-			>;
320
-		};
289
+	pinctrl_ecspi1: ecspi1grp {
290
+		fsl,pins = <
291
+			MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
292
+			MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
293
+			MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
294
+			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09  0x1b0b0
295
+			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
296
+			MX6QDL_PAD_KEY_COL2__GPIO4_IO10  0x1b0b0
297
+		>;
298
+	};
321299 
322
-		pinctrl_flexcan2: flexcan2grp {
323
-			fsl,pins = <
324
-				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
325
-				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
326
-			>;
327
-		};
300
+	pinctrl_flexcan2: flexcan2grp {
301
+		fsl,pins = <
302
+			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
303
+			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
304
+		>;
305
+	};
328306 
329
-		pinctrl_gpio_keys: gpiokeysgrp {
330
-			fsl,pins = <
331
-				MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
332
-			>;
333
-		};
307
+	pinctrl_gpio_keys: gpiokeysgrp {
308
+		fsl,pins = <
309
+			MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
310
+		>;
311
+	};
334312 
335
-		pinctrl_gpio_leds: gpioledsgrp {
336
-			fsl,pins = <
337
-				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
338
-			>;
339
-		};
313
+	pinctrl_gpio_leds: gpioledsgrp {
314
+		fsl,pins = <
315
+			MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
316
+		>;
317
+	};
340318 
341
-		pinctrl_gpios: gpiosgrp {
342
-			fsl,pins = <
343
-				MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		0x100b1
344
-				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x100b1
345
-				MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x100b1
346
-				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x100b1
347
-				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x100b1
348
-				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	0x100b1
349
-				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x100b1
350
-				MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	0x100b1
351
-				MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x100b1
352
-			>;
353
-		};
319
+	pinctrl_gpios: gpiosgrp {
320
+		fsl,pins = <
321
+			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		0x100b1
322
+			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x100b1
323
+			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x100b1
324
+			MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x100b1
325
+			MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x100b1
326
+			MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16	0x100b1
327
+			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x100b1
328
+			MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18	0x100b1
329
+			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x100b1
330
+		>;
331
+	};
354332 
355
-		pinctrl_gsm: gsmgrp {
356
-			fsl,pins = <
357
-				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x130b0 /* GSM_POKIN */
358
-				MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
359
-			>;
360
-		};
333
+	pinctrl_gsm: gsmgrp {
334
+		fsl,pins = <
335
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x130b0 /* GSM_POKIN */
336
+			MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
337
+		>;
338
+	};
361339 
362
-		pinctrl_i2c1: i2c1grp {
363
-			fsl,pins = <
364
-				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
365
-				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
366
-			>;
367
-		};
340
+	pinctrl_i2c1: i2c1grp {
341
+		fsl,pins = <
342
+			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
343
+			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
344
+		>;
345
+	};
368346 
369
-		pinctrl_i2c2: i2c2grp {
370
-			fsl,pins = <
371
-				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
372
-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
373
-			>;
374
-		};
347
+	pinctrl_i2c2: i2c2grp {
348
+		fsl,pins = <
349
+			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
350
+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
351
+		>;
352
+	};
375353 
376
-		pinctrl_i2c3: i2c3grp {
377
-			fsl,pins = <
378
-				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
379
-				MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
380
-			>;
381
-		};
354
+	pinctrl_i2c3: i2c3grp {
355
+		fsl,pins = <
356
+			MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
357
+			MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
358
+		>;
359
+	};
382360 
383
-		pinctrl_ipu1_disp1: ipu1disp1grp {
384
-			fsl,pins = <
385
-				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x100b1
386
-				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x100b1
387
-				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x100b1
388
-				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x100b1
389
-				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x100b1
390
-				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x100b1
391
-				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x100b1
392
-				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x100b1
393
-				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x100b1
394
-				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x100b1
395
-				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x100b1
396
-				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x100b1
397
-				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x100b1
398
-				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x100b1
399
-				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x100b1
400
-				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x100b1
401
-				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x100b1
402
-				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x100b1
403
-				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x100b1
404
-				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x100b1
405
-				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x100b1
406
-				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x100b1
407
-			>;
408
-		};
361
+	pinctrl_ipu1_disp0: ipu1disp0grp {
362
+		fsl,pins = <
363
+			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x100b1
364
+			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x100b1
365
+			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x100b1
366
+			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x100b1
367
+			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x100b1
368
+			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x100b1
369
+			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x100b1
370
+			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x100b1
371
+			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x100b1
372
+			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x100b1
373
+			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x100b1
374
+			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x100b1
375
+			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x100b1
376
+			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x100b1
377
+			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x100b1
378
+			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x100b1
379
+			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x100b1
380
+			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x100b1
381
+			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x100b1
382
+			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x100b1
383
+			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x100b1
384
+			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x100b1
385
+		>;
386
+	};
409387 
410
-		pinctrl_pcie: pciegrp {
411
-			fsl,pins = <
412
-				MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
413
-			>;
414
-		};
388
+	pinctrl_pcie: pciegrp {
389
+		fsl,pins = <
390
+			MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
391
+		>;
392
+	};
415393 
416
-		pinctrl_pwm3: pwm3grp {
417
-			fsl,pins = <
418
-				MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
419
-			>;
420
-		};
394
+	pinctrl_pwm3: pwm3grp {
395
+		fsl,pins = <
396
+			MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
397
+		>;
398
+	};
421399 
422
-		pinctrl_uart1: uart1grp {
423
-			fsl,pins = <
424
-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
425
-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
426
-			>;
427
-		};
400
+	pinctrl_uart1: uart1grp {
401
+		fsl,pins = <
402
+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
403
+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
404
+		>;
405
+	};
428406 
429
-		pinctrl_uart3: uart3grp {
430
-			fsl,pins = <
431
-				MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b0
432
-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
433
-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
434
-				MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b0
435
-			>;
436
-		};
407
+	pinctrl_uart3: uart3grp {
408
+		fsl,pins = <
409
+			MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b0
410
+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
411
+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
412
+			MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b0
413
+		>;
414
+	};
437415 
438
-		pinctrl_uart4: uart4grp {
439
-			fsl,pins = <
440
-				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
441
-				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
442
-			>;
443
-		};
416
+	pinctrl_uart4: uart4grp {
417
+		fsl,pins = <
418
+			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
419
+			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
420
+		>;
421
+	};
444422 
445
-		pinctrl_usbotg: usbotggrp {
446
-			fsl,pins = <
447
-				MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
448
-			>;
449
-		};
423
+	pinctrl_usbotg: usbotggrp {
424
+		fsl,pins = <
425
+			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
426
+		>;
427
+	};
450428 
451
-		pinctrl_usdhc2: usdhc2grp {
452
-			fsl,pins = <
453
-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
454
-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
455
-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
456
-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
457
-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
458
-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
459
-			>;
460
-		};
429
+	pinctrl_usdhc2: usdhc2grp {
430
+		fsl,pins = <
431
+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
432
+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
433
+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
434
+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
435
+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
436
+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
437
+		>;
438
+	};
461439 
462
-		pinctrl_spdif: spdifgrp {
463
-			fsl,pins = <
464
-				MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
465
-			>;
466
-		};
440
+	pinctrl_spdif: spdifgrp {
441
+		fsl,pins = <
442
+			MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
443
+		>;
444
+	};
467445 
468
-		pinctrl_touchscreen: touchscreengrp {
469
-			fsl,pins = <
470
-				MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
471
-			>;
472
-		};
446
+	pinctrl_touchscreen: touchscreengrp {
447
+		fsl,pins = <
448
+			MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
449
+		>;
473450 	};
474451 };