forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5
kernel/tools/perf/pmu-events/arch/x86/sandybridge/memory.json
....@@ -1,5 +1,32 @@
11 [
22 {
3
+ "EventCode": "0x05",
4
+ "Counter": "0,1,2,3",
5
+ "UMask": "0x1",
6
+ "EventName": "MISALIGN_MEM_REF.LOADS",
7
+ "SampleAfterValue": "2000003",
8
+ "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache.",
9
+ "CounterHTOff": "0,1,2,3,4,5,6,7"
10
+ },
11
+ {
12
+ "EventCode": "0x05",
13
+ "Counter": "0,1,2,3",
14
+ "UMask": "0x2",
15
+ "EventName": "MISALIGN_MEM_REF.STORES",
16
+ "SampleAfterValue": "2000003",
17
+ "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache.",
18
+ "CounterHTOff": "0,1,2,3,4,5,6,7"
19
+ },
20
+ {
21
+ "EventCode": "0xBE",
22
+ "Counter": "0,1,2,3",
23
+ "UMask": "0x1",
24
+ "EventName": "PAGE_WALKS.LLC_MISS",
25
+ "SampleAfterValue": "100003",
26
+ "BriefDescription": "Number of any page walk that had a miss in LLC. Does not necessary cause a SUSPEND.",
27
+ "CounterHTOff": "0,1,2,3,4,5,6,7"
28
+ },
29
+ {
330 "PublicDescription": "This event counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from memory disambiguation, external snoops, or cross SMT-HW-thread snoop (stores) hitting load buffers. Machine clears can have a significant performance impact if they are happening frequently.",
431 "EventCode": "0xC3",
532 "Counter": "0,1,2,3",
....@@ -124,33 +151,6 @@
124151 "PRECISE_STORE": "1",
125152 "TakenAlone": "1",
126153 "CounterHTOff": "3"
127
- },
128
- {
129
- "EventCode": "0xBE",
130
- "Counter": "0,1,2,3",
131
- "UMask": "0x1",
132
- "EventName": "PAGE_WALKS.LLC_MISS",
133
- "SampleAfterValue": "100003",
134
- "BriefDescription": "Number of any page walk that had a miss in LLC. Does not necessary cause a SUSPEND.",
135
- "CounterHTOff": "0,1,2,3,4,5,6,7"
136
- },
137
- {
138
- "EventCode": "0x05",
139
- "Counter": "0,1,2,3",
140
- "UMask": "0x1",
141
- "EventName": "MISALIGN_MEM_REF.LOADS",
142
- "SampleAfterValue": "2000003",
143
- "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache.",
144
- "CounterHTOff": "0,1,2,3,4,5,6,7"
145
- },
146
- {
147
- "EventCode": "0x05",
148
- "Counter": "0,1,2,3",
149
- "UMask": "0x2",
150
- "EventName": "MISALIGN_MEM_REF.STORES",
151
- "SampleAfterValue": "2000003",
152
- "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache.",
153
- "CounterHTOff": "0,1,2,3,4,5,6,7"
154154 },
155155 {
156156 "EventCode": "0xB7, 0xBB",
....@@ -367,7 +367,7 @@
367367 "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LLC_MISS_LOCAL.DRAM",
368368 "MSRIndex": "0x1a6,0x1a7",
369369 "SampleAfterValue": "100003",
370
- "BriefDescription": " REQUEST = ANY_REQUEST and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
370
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
371371 "CounterHTOff": "0,1,2,3"
372372 },
373373 {
....@@ -379,7 +379,7 @@
379379 "EventName": "OFFCORE_RESPONSE.DATA_IN_SOCKET.LLC_MISS_LOCAL.ANY_LLC_HIT",
380380 "MSRIndex": "0x1a6,0x1a7",
381381 "SampleAfterValue": "100003",
382
- "BriefDescription": " REQUEST = DATA_IN_SOCKET and RESPONSE = LLC_MISS_LOCAL and SNOOP = ANY_LLC_HIT",
382
+ "BriefDescription": "REQUEST = DATA_IN_SOCKET and RESPONSE = LLC_MISS_LOCAL and SNOOP = ANY_LLC_HIT",
383383 "CounterHTOff": "0,1,2,3"
384384 },
385385 {
....@@ -391,7 +391,7 @@
391391 "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LLC_MISS_LOCAL.DRAM",
392392 "MSRIndex": "0x1a6,0x1a7",
393393 "SampleAfterValue": "100003",
394
- "BriefDescription": " REQUEST = DEMAND_IFETCH and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
394
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
395395 "CounterHTOff": "0,1,2,3"
396396 },
397397 {
....@@ -403,7 +403,7 @@
403403 "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LLC_MISS_LOCAL.DRAM",
404404 "MSRIndex": "0x1a6,0x1a7",
405405 "SampleAfterValue": "100003",
406
- "BriefDescription": " REQUEST = PF_DATA_RD and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
406
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
407407 "CounterHTOff": "0,1,2,3"
408408 },
409409 {
....@@ -415,7 +415,7 @@
415415 "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LLC_MISS_LOCAL.DRAM",
416416 "MSRIndex": "0x1a6,0x1a7",
417417 "SampleAfterValue": "100003",
418
- "BriefDescription": " REQUEST = PF_RFO and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
418
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
419419 "CounterHTOff": "0,1,2,3"
420420 },
421421 {
....@@ -427,7 +427,7 @@
427427 "EventName": "OFFCORE_RESPONSE.PF_L_DATA_RD.LLC_MISS_LOCAL.DRAM",
428428 "MSRIndex": "0x1a6,0x1a7",
429429 "SampleAfterValue": "100003",
430
- "BriefDescription": " REQUEST = PF_LLC_DATA_RD and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
430
+ "BriefDescription": "REQUEST = PF_LLC_DATA_RD and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
431431 "CounterHTOff": "0,1,2,3"
432432 },
433433 {
....@@ -439,7 +439,7 @@
439439 "EventName": "OFFCORE_RESPONSE.PF_L_IFETCH.LLC_MISS_LOCAL.DRAM",
440440 "MSRIndex": "0x1a6,0x1a7",
441441 "SampleAfterValue": "100003",
442
- "BriefDescription": " REQUEST = PF_LLC_IFETCH and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
442
+ "BriefDescription": "REQUEST = PF_LLC_IFETCH and RESPONSE = LLC_MISS_LOCAL and SNOOP = DRAM",
443443 "CounterHTOff": "0,1,2,3"
444444 }
445445 ]