.. | .. |
---|
1 | 1 | [ |
---|
2 | 2 | { |
---|
3 | | - "EventCode": "0xC1", |
---|
4 | | - "Counter": "0,1,2,3", |
---|
5 | | - "UMask": "0x8", |
---|
6 | | - "EventName": "OTHER_ASSISTS.AVX_STORE", |
---|
7 | | - "SampleAfterValue": "100003", |
---|
8 | | - "BriefDescription": "Number of GSSE memory assist for stores. GSSE microcode assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.", |
---|
9 | | - "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
10 | | - }, |
---|
11 | | - { |
---|
12 | | - "EventCode": "0xC1", |
---|
13 | | - "Counter": "0,1,2,3", |
---|
14 | | - "UMask": "0x10", |
---|
15 | | - "EventName": "OTHER_ASSISTS.AVX_TO_SSE", |
---|
16 | | - "SampleAfterValue": "100003", |
---|
17 | | - "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.", |
---|
18 | | - "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
19 | | - }, |
---|
20 | | - { |
---|
21 | | - "EventCode": "0xC1", |
---|
22 | | - "Counter": "0,1,2,3", |
---|
23 | | - "UMask": "0x20", |
---|
24 | | - "EventName": "OTHER_ASSISTS.SSE_TO_AVX", |
---|
25 | | - "SampleAfterValue": "100003", |
---|
26 | | - "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.", |
---|
27 | | - "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
28 | | - }, |
---|
29 | | - { |
---|
30 | | - "EventCode": "0xCA", |
---|
31 | | - "Counter": "0,1,2,3", |
---|
32 | | - "UMask": "0x2", |
---|
33 | | - "EventName": "FP_ASSIST.X87_OUTPUT", |
---|
34 | | - "SampleAfterValue": "100003", |
---|
35 | | - "BriefDescription": "Number of X87 assists due to output value.", |
---|
36 | | - "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
37 | | - }, |
---|
38 | | - { |
---|
39 | | - "EventCode": "0xCA", |
---|
40 | | - "Counter": "0,1,2,3", |
---|
41 | | - "UMask": "0x4", |
---|
42 | | - "EventName": "FP_ASSIST.X87_INPUT", |
---|
43 | | - "SampleAfterValue": "100003", |
---|
44 | | - "BriefDescription": "Number of X87 assists due to input value.", |
---|
45 | | - "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
46 | | - }, |
---|
47 | | - { |
---|
48 | | - "EventCode": "0xCA", |
---|
49 | | - "Counter": "0,1,2,3", |
---|
50 | | - "UMask": "0x8", |
---|
51 | | - "EventName": "FP_ASSIST.SIMD_OUTPUT", |
---|
52 | | - "SampleAfterValue": "100003", |
---|
53 | | - "BriefDescription": "Number of SIMD FP assists due to Output values.", |
---|
54 | | - "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
55 | | - }, |
---|
56 | | - { |
---|
57 | | - "EventCode": "0xCA", |
---|
58 | | - "Counter": "0,1,2,3", |
---|
59 | | - "UMask": "0x10", |
---|
60 | | - "EventName": "FP_ASSIST.SIMD_INPUT", |
---|
61 | | - "SampleAfterValue": "100003", |
---|
62 | | - "BriefDescription": "Number of SIMD FP assists due to input values.", |
---|
63 | | - "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
64 | | - }, |
---|
65 | | - { |
---|
66 | 3 | "EventCode": "0x10", |
---|
67 | 4 | "Counter": "0,1,2,3", |
---|
68 | 5 | "UMask": "0x1", |
---|
.. | .. |
---|
126 | 63 | "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
127 | 64 | }, |
---|
128 | 65 | { |
---|
| 66 | + "EventCode": "0xC1", |
---|
| 67 | + "Counter": "0,1,2,3", |
---|
| 68 | + "UMask": "0x8", |
---|
| 69 | + "EventName": "OTHER_ASSISTS.AVX_STORE", |
---|
| 70 | + "SampleAfterValue": "100003", |
---|
| 71 | + "BriefDescription": "Number of GSSE memory assist for stores. GSSE microcode assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.", |
---|
| 72 | + "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
| 73 | + }, |
---|
| 74 | + { |
---|
| 75 | + "EventCode": "0xC1", |
---|
| 76 | + "Counter": "0,1,2,3", |
---|
| 77 | + "UMask": "0x10", |
---|
| 78 | + "EventName": "OTHER_ASSISTS.AVX_TO_SSE", |
---|
| 79 | + "SampleAfterValue": "100003", |
---|
| 80 | + "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.", |
---|
| 81 | + "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
| 82 | + }, |
---|
| 83 | + { |
---|
| 84 | + "EventCode": "0xC1", |
---|
| 85 | + "Counter": "0,1,2,3", |
---|
| 86 | + "UMask": "0x20", |
---|
| 87 | + "EventName": "OTHER_ASSISTS.SSE_TO_AVX", |
---|
| 88 | + "SampleAfterValue": "100003", |
---|
| 89 | + "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.", |
---|
| 90 | + "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
| 91 | + }, |
---|
| 92 | + { |
---|
| 93 | + "EventCode": "0xCA", |
---|
| 94 | + "Counter": "0,1,2,3", |
---|
| 95 | + "UMask": "0x2", |
---|
| 96 | + "EventName": "FP_ASSIST.X87_OUTPUT", |
---|
| 97 | + "SampleAfterValue": "100003", |
---|
| 98 | + "BriefDescription": "Number of X87 assists due to output value.", |
---|
| 99 | + "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
| 100 | + }, |
---|
| 101 | + { |
---|
| 102 | + "EventCode": "0xCA", |
---|
| 103 | + "Counter": "0,1,2,3", |
---|
| 104 | + "UMask": "0x4", |
---|
| 105 | + "EventName": "FP_ASSIST.X87_INPUT", |
---|
| 106 | + "SampleAfterValue": "100003", |
---|
| 107 | + "BriefDescription": "Number of X87 assists due to input value.", |
---|
| 108 | + "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
| 109 | + }, |
---|
| 110 | + { |
---|
| 111 | + "EventCode": "0xCA", |
---|
| 112 | + "Counter": "0,1,2,3", |
---|
| 113 | + "UMask": "0x8", |
---|
| 114 | + "EventName": "FP_ASSIST.SIMD_OUTPUT", |
---|
| 115 | + "SampleAfterValue": "100003", |
---|
| 116 | + "BriefDescription": "Number of SIMD FP assists due to Output values.", |
---|
| 117 | + "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
| 118 | + }, |
---|
| 119 | + { |
---|
| 120 | + "EventCode": "0xCA", |
---|
| 121 | + "Counter": "0,1,2,3", |
---|
| 122 | + "UMask": "0x10", |
---|
| 123 | + "EventName": "FP_ASSIST.SIMD_INPUT", |
---|
| 124 | + "SampleAfterValue": "100003", |
---|
| 125 | + "BriefDescription": "Number of SIMD FP assists due to input values.", |
---|
| 126 | + "CounterHTOff": "0,1,2,3,4,5,6,7" |
---|
| 127 | + }, |
---|
| 128 | + { |
---|
129 | 129 | "EventCode": "0xCA", |
---|
130 | 130 | "Counter": "0,1,2,3", |
---|
131 | 131 | "UMask": "0x1e", |
---|