.. | .. |
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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | config SND_SOC_TEGRA |
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2 | 3 | tristate "SoC Audio for the Tegra System-on-Chip" |
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3 | 4 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
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.. | .. |
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61 | 62 | Tegra30 I2S interface. You will also need to select the individual |
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62 | 63 | machine drivers to support below. |
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63 | 64 | |
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| 65 | +config SND_SOC_TEGRA210_AHUB |
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| 66 | + tristate "Tegra210 AHUB module" |
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| 67 | + depends on SND_SOC_TEGRA |
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| 68 | + help |
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| 69 | + Config to enable Audio Hub (AHUB) module, which comprises of a |
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| 70 | + switch called Audio Crossbar (AXBAR) used to configure or modify |
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| 71 | + the audio routing path between various HW accelerators present in |
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| 72 | + AHUB. |
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| 73 | + Say Y or M if you want to add support for Tegra210 AHUB module. |
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| 74 | + |
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| 75 | +config SND_SOC_TEGRA210_DMIC |
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| 76 | + tristate "Tegra210 DMIC module" |
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| 77 | + depends on SND_SOC_TEGRA |
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| 78 | + help |
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| 79 | + Config to enable the Digital MIC (DMIC) controller which is used |
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| 80 | + to interface with Pulse Density Modulation (PDM) input devices. |
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| 81 | + The DMIC controller implements a converter to convert PDM signals |
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| 82 | + to Pulse Code Modulation (PCM) signals. This can be viewed as a |
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| 83 | + PDM receiver. |
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| 84 | + Say Y or M if you want to add support for Tegra210 DMIC module. |
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| 85 | + |
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| 86 | +config SND_SOC_TEGRA210_I2S |
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| 87 | + tristate "Tegra210 I2S module" |
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| 88 | + depends on SND_SOC_TEGRA |
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| 89 | + help |
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| 90 | + Config to enable the Inter-IC Sound (I2S) Controller which |
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| 91 | + implements full-duplex and bidirectional and single direction |
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| 92 | + point-to-point serial interfaces. It can interface with I2S |
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| 93 | + compatible devices. |
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| 94 | + Say Y or M if you want to add support for Tegra210 I2S module. |
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| 95 | + |
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| 96 | +config SND_SOC_TEGRA186_DSPK |
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| 97 | + tristate "Tegra186 DSPK module" |
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| 98 | + depends on SND_SOC_TEGRA |
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| 99 | + help |
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| 100 | + Config to enable the Digital Speaker Controller (DSPK) which |
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| 101 | + converts the multi-bit Pulse Code Modulation (PCM) audio input to |
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| 102 | + oversampled 1-bit Pulse Density Modulation (PDM) output. From the |
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| 103 | + signal flow perspective DSPK can be viewed as a PDM transmitter |
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| 104 | + that up-samples the input to the desired sampling rate by |
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| 105 | + interpolation and then converts the oversampled PCM input to |
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| 106 | + the desired 1-bit output via Delta Sigma Modulation (DSM). |
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| 107 | + Say Y or M if you want to add support for Tegra186 DSPK module. |
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| 108 | + |
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| 109 | +config SND_SOC_TEGRA210_ADMAIF |
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| 110 | + tristate "Tegra210 ADMAIF module" |
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| 111 | + depends on SND_SOC_TEGRA |
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| 112 | + help |
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| 113 | + Config to enable ADMAIF which is the interface between ADMA and |
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| 114 | + Audio Hub (AHUB). Each ADMA channel that sends/receives data to/ |
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| 115 | + from AHUB must interface through an ADMAIF channel. ADMA channel |
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| 116 | + sending data to AHUB pairs with an ADMAIF Tx channel, where as |
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| 117 | + ADMA channel receiving data from AHUB pairs with an ADMAIF Rx |
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| 118 | + channel. Buffer size is configurable for each ADMAIIF channel. |
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| 119 | + Say Y or M if you want to add support for Tegra210 ADMAIF module. |
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| 120 | + |
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64 | 121 | config SND_SOC_TEGRA_RT5640 |
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65 | 122 | tristate "SoC Audio support for Tegra boards using an RT5640 codec" |
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66 | 123 | depends on SND_SOC_TEGRA && I2C && GPIOLIB |
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