.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * motu-protocol-v3.c - a part of driver for MOTU FireWire series |
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3 | 4 | * |
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4 | 5 | * Copyright (c) 2015-2017 Takashi Sakamoto <o-takashi@sakamocchi.jp> |
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5 | | - * |
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6 | | - * Licensed under the terms of the GNU General Public License, version 2. |
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7 | 6 | */ |
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8 | 7 | |
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9 | 8 | #include <linux/delay.h> |
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.. | .. |
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25 | 24 | #define V3_NO_ADAT_OPT_OUT_IFACE_A 0x00040000 |
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26 | 25 | #define V3_NO_ADAT_OPT_OUT_IFACE_B 0x00400000 |
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27 | 26 | |
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28 | | -static int v3_get_clock_rate(struct snd_motu *motu, unsigned int *rate) |
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| 27 | +#define V3_MSG_FLAG_CLK_CHANGED 0x00000002 |
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| 28 | +#define V3_CLK_WAIT_MSEC 4000 |
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| 29 | + |
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| 30 | +int snd_motu_protocol_v3_get_clock_rate(struct snd_motu *motu, |
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| 31 | + unsigned int *rate) |
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29 | 32 | { |
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30 | 33 | __be32 reg; |
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31 | 34 | u32 data; |
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.. | .. |
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46 | 49 | return 0; |
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47 | 50 | } |
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48 | 51 | |
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49 | | -static int v3_set_clock_rate(struct snd_motu *motu, unsigned int rate) |
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| 52 | +int snd_motu_protocol_v3_set_clock_rate(struct snd_motu *motu, |
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| 53 | + unsigned int rate) |
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50 | 54 | { |
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51 | 55 | __be32 reg; |
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52 | 56 | u32 data; |
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.. | .. |
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78 | 82 | return err; |
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79 | 83 | |
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80 | 84 | if (need_to_wait) { |
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81 | | - /* Cost expensive. */ |
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82 | | - if (msleep_interruptible(4000) > 0) |
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83 | | - return -EINTR; |
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| 85 | + int result; |
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| 86 | + |
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| 87 | + motu->msg = 0; |
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| 88 | + result = wait_event_interruptible_timeout(motu->hwdep_wait, |
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| 89 | + motu->msg & V3_MSG_FLAG_CLK_CHANGED, |
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| 90 | + msecs_to_jiffies(V3_CLK_WAIT_MSEC)); |
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| 91 | + if (result < 0) |
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| 92 | + return result; |
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| 93 | + if (result == 0) |
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| 94 | + return -ETIMEDOUT; |
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84 | 95 | } |
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85 | 96 | |
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86 | 97 | return 0; |
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87 | 98 | } |
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88 | 99 | |
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89 | | -static int v3_get_clock_source(struct snd_motu *motu, |
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90 | | - enum snd_motu_clock_source *src) |
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| 100 | +static int detect_clock_source_828mk3(struct snd_motu *motu, u32 data, |
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| 101 | + enum snd_motu_clock_source *src) |
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| 102 | +{ |
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| 103 | + switch (data) { |
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| 104 | + case 0x00: |
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| 105 | + *src = SND_MOTU_CLOCK_SOURCE_INTERNAL; |
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| 106 | + break; |
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| 107 | + case 0x01: |
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| 108 | + *src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC; |
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| 109 | + break; |
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| 110 | + case 0x02: |
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| 111 | + *src = SND_MOTU_CLOCK_SOURCE_SPH; |
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| 112 | + break; |
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| 113 | + case 0x10: |
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| 114 | + *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX; |
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| 115 | + break; |
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| 116 | + case 0x18: |
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| 117 | + case 0x19: |
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| 118 | + { |
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| 119 | + __be32 reg; |
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| 120 | + u32 options; |
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| 121 | + int err; |
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| 122 | + |
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| 123 | + err = snd_motu_transaction_read(motu, |
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| 124 | + V3_OPT_IFACE_MODE_OFFSET, ®, sizeof(reg)); |
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| 125 | + if (err < 0) |
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| 126 | + return err; |
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| 127 | + options = be32_to_cpu(reg); |
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| 128 | + |
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| 129 | + if (data == 0x18) { |
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| 130 | + if (options & V3_NO_ADAT_OPT_IN_IFACE_A) |
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| 131 | + *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT_A; |
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| 132 | + else |
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| 133 | + *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT_A; |
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| 134 | + } else { |
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| 135 | + if (options & V3_NO_ADAT_OPT_IN_IFACE_B) |
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| 136 | + *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT_B; |
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| 137 | + else |
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| 138 | + *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT_B; |
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| 139 | + } |
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| 140 | + |
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| 141 | + break; |
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| 142 | + } |
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| 143 | + default: |
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| 144 | + *src = SND_MOTU_CLOCK_SOURCE_UNKNOWN; |
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| 145 | + break; |
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| 146 | + } |
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| 147 | + |
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| 148 | + return 0; |
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| 149 | +} |
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| 150 | + |
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| 151 | +static int v3_detect_clock_source(struct snd_motu *motu, u32 data, |
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| 152 | + enum snd_motu_clock_source *src) |
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| 153 | +{ |
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| 154 | + switch (data) { |
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| 155 | + case 0x00: |
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| 156 | + *src = SND_MOTU_CLOCK_SOURCE_INTERNAL; |
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| 157 | + break; |
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| 158 | + case 0x01: |
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| 159 | + *src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC; |
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| 160 | + break; |
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| 161 | + case 0x02: |
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| 162 | + *src = SND_MOTU_CLOCK_SOURCE_SPH; |
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| 163 | + break; |
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| 164 | + case 0x10: |
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| 165 | + *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX; |
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| 166 | + break; |
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| 167 | + default: |
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| 168 | + *src = SND_MOTU_CLOCK_SOURCE_UNKNOWN; |
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| 169 | + break; |
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| 170 | + } |
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| 171 | + |
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| 172 | + return 0; |
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| 173 | +} |
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| 174 | + |
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| 175 | +int snd_motu_protocol_v3_get_clock_source(struct snd_motu *motu, |
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| 176 | + enum snd_motu_clock_source *src) |
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91 | 177 | { |
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92 | 178 | __be32 reg; |
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93 | 179 | u32 data; |
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94 | | - unsigned int val; |
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95 | 180 | int err; |
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96 | 181 | |
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97 | 182 | err = snd_motu_transaction_read(motu, V3_CLOCK_STATUS_OFFSET, ®, |
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98 | 183 | sizeof(reg)); |
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99 | 184 | if (err < 0) |
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100 | 185 | return err; |
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101 | | - data = be32_to_cpu(reg); |
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| 186 | + data = be32_to_cpu(reg) & V3_CLOCK_SOURCE_MASK; |
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102 | 187 | |
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103 | | - val = data & V3_CLOCK_SOURCE_MASK; |
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104 | | - if (val == 0x00) { |
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105 | | - *src = SND_MOTU_CLOCK_SOURCE_INTERNAL; |
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106 | | - } else if (val == 0x01) { |
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107 | | - *src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC; |
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108 | | - } else if (val == 0x10) { |
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109 | | - *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX; |
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110 | | - } else if (val == 0x18 || val == 0x19) { |
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111 | | - err = snd_motu_transaction_read(motu, V3_OPT_IFACE_MODE_OFFSET, |
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112 | | - ®, sizeof(reg)); |
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113 | | - if (err < 0) |
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114 | | - return err; |
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115 | | - data = be32_to_cpu(reg); |
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116 | | - |
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117 | | - if (val == 0x18) { |
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118 | | - if (data & V3_NO_ADAT_OPT_IN_IFACE_A) |
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119 | | - *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT_A; |
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120 | | - else |
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121 | | - *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT_A; |
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122 | | - } else { |
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123 | | - if (data & V3_NO_ADAT_OPT_IN_IFACE_B) |
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124 | | - *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT_B; |
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125 | | - else |
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126 | | - *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT_B; |
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127 | | - } |
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128 | | - } else { |
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129 | | - *src = SND_MOTU_CLOCK_SOURCE_UNKNOWN; |
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130 | | - } |
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131 | | - |
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132 | | - return 0; |
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| 188 | + if (motu->spec == &snd_motu_spec_828mk3) |
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| 189 | + return detect_clock_source_828mk3(motu, data, src); |
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| 190 | + else |
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| 191 | + return v3_detect_clock_source(motu, data, src); |
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133 | 192 | } |
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134 | 193 | |
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135 | | -static int v3_switch_fetching_mode(struct snd_motu *motu, bool enable) |
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| 194 | +int snd_motu_protocol_v3_switch_fetching_mode(struct snd_motu *motu, |
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| 195 | + bool enable) |
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136 | 196 | { |
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137 | 197 | __be32 reg; |
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138 | 198 | u32 data; |
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.. | .. |
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154 | 214 | sizeof(reg)); |
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155 | 215 | } |
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156 | 216 | |
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157 | | -static void calculate_fixed_part(struct snd_motu_packet_format *formats, |
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158 | | - enum amdtp_stream_direction dir, |
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159 | | - enum snd_motu_spec_flags flags, |
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160 | | - unsigned char analog_ports) |
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| 217 | +static int detect_packet_formats_828mk3(struct snd_motu *motu, u32 data) |
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161 | 218 | { |
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162 | | - unsigned char pcm_chunks[3] = {0, 0, 0}; |
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163 | | - |
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164 | | - formats->msg_chunks = 2; |
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165 | | - |
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166 | | - pcm_chunks[0] = analog_ports; |
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167 | | - pcm_chunks[1] = analog_ports; |
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168 | | - if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4) |
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169 | | - pcm_chunks[2] = analog_ports; |
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170 | | - |
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171 | | - if (dir == AMDTP_IN_STREAM) { |
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172 | | - if (flags & SND_MOTU_SPEC_TX_MICINST_CHUNK) { |
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173 | | - pcm_chunks[0] += 2; |
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174 | | - pcm_chunks[1] += 2; |
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175 | | - if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4) |
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176 | | - pcm_chunks[2] += 2; |
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| 219 | + if (data & V3_ENABLE_OPT_IN_IFACE_A) { |
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| 220 | + if (data & V3_NO_ADAT_OPT_IN_IFACE_A) { |
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| 221 | + motu->tx_packet_formats.pcm_chunks[0] += 4; |
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| 222 | + motu->tx_packet_formats.pcm_chunks[1] += 4; |
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| 223 | + } else { |
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| 224 | + motu->tx_packet_formats.pcm_chunks[0] += 8; |
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| 225 | + motu->tx_packet_formats.pcm_chunks[1] += 4; |
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177 | 226 | } |
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178 | | - |
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179 | | - if (flags & SND_MOTU_SPEC_TX_RETURN_CHUNK) { |
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180 | | - pcm_chunks[0] += 2; |
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181 | | - pcm_chunks[1] += 2; |
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182 | | - if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4) |
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183 | | - pcm_chunks[2] += 2; |
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184 | | - } |
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185 | | - |
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186 | | - if (flags & SND_MOTU_SPEC_TX_REVERB_CHUNK) { |
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187 | | - pcm_chunks[0] += 2; |
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188 | | - pcm_chunks[1] += 2; |
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189 | | - } |
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190 | | - } else { |
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191 | | - if (flags & SND_MOTU_SPEC_RX_SEPARETED_MAIN) { |
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192 | | - pcm_chunks[0] += 2; |
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193 | | - pcm_chunks[1] += 2; |
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194 | | - } |
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195 | | - |
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196 | | - // Packets to v3 units include 2 chunks for phone 1/2, except |
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197 | | - // for 176.4/192.0 kHz. |
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198 | | - pcm_chunks[0] += 2; |
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199 | | - pcm_chunks[1] += 2; |
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200 | 227 | } |
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201 | 228 | |
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202 | | - if (flags & SND_MOTU_SPEC_HAS_AESEBU_IFACE) { |
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203 | | - pcm_chunks[0] += 2; |
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204 | | - pcm_chunks[1] += 2; |
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| 229 | + if (data & V3_ENABLE_OPT_IN_IFACE_B) { |
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| 230 | + if (data & V3_NO_ADAT_OPT_IN_IFACE_B) { |
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| 231 | + motu->tx_packet_formats.pcm_chunks[0] += 4; |
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| 232 | + motu->tx_packet_formats.pcm_chunks[1] += 4; |
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| 233 | + } else { |
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| 234 | + motu->tx_packet_formats.pcm_chunks[0] += 8; |
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| 235 | + motu->tx_packet_formats.pcm_chunks[1] += 4; |
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| 236 | + } |
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205 | 237 | } |
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206 | 238 | |
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207 | | - /* |
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208 | | - * At least, packets have two data chunks for S/PDIF on coaxial |
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209 | | - * interface. |
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210 | | - */ |
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211 | | - pcm_chunks[0] += 2; |
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212 | | - pcm_chunks[1] += 2; |
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| 239 | + if (data & V3_ENABLE_OPT_OUT_IFACE_A) { |
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| 240 | + if (data & V3_NO_ADAT_OPT_OUT_IFACE_A) { |
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| 241 | + motu->rx_packet_formats.pcm_chunks[0] += 4; |
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| 242 | + motu->rx_packet_formats.pcm_chunks[1] += 4; |
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| 243 | + } else { |
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| 244 | + motu->rx_packet_formats.pcm_chunks[0] += 8; |
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| 245 | + motu->rx_packet_formats.pcm_chunks[1] += 4; |
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| 246 | + } |
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| 247 | + } |
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213 | 248 | |
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214 | | - /* |
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215 | | - * Fixed part consists of PCM chunks multiple of 4, with msg chunks. As |
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216 | | - * a result, this part can includes empty data chunks. |
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217 | | - */ |
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218 | | - formats->fixed_part_pcm_chunks[0] = round_up(2 + pcm_chunks[0], 4) - 2; |
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219 | | - formats->fixed_part_pcm_chunks[1] = round_up(2 + pcm_chunks[1], 4) - 2; |
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220 | | - if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4) |
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221 | | - formats->fixed_part_pcm_chunks[2] = |
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222 | | - round_up(2 + pcm_chunks[2], 4) - 2; |
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| 249 | + if (data & V3_ENABLE_OPT_OUT_IFACE_B) { |
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| 250 | + if (data & V3_NO_ADAT_OPT_OUT_IFACE_B) { |
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| 251 | + motu->rx_packet_formats.pcm_chunks[0] += 4; |
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| 252 | + motu->rx_packet_formats.pcm_chunks[1] += 4; |
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| 253 | + } else { |
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| 254 | + motu->rx_packet_formats.pcm_chunks[0] += 8; |
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| 255 | + motu->rx_packet_formats.pcm_chunks[1] += 4; |
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| 256 | + } |
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| 257 | + } |
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| 258 | + |
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| 259 | + return 0; |
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223 | 260 | } |
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224 | 261 | |
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225 | | -static void calculate_differed_part(struct snd_motu_packet_format *formats, |
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226 | | - enum snd_motu_spec_flags flags, u32 data, |
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227 | | - u32 a_enable_mask, u32 a_no_adat_mask, |
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228 | | - u32 b_enable_mask, u32 b_no_adat_mask) |
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229 | | -{ |
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230 | | - unsigned char pcm_chunks[3] = {0, 0, 0}; |
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231 | | - int i; |
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232 | | - |
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233 | | - if ((flags & SND_MOTU_SPEC_HAS_OPT_IFACE_A) && (data & a_enable_mask)) { |
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234 | | - if (data & a_no_adat_mask) { |
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235 | | - /* |
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236 | | - * Additional two data chunks for S/PDIF on optical |
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237 | | - * interface A. This includes empty data chunks. |
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238 | | - */ |
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239 | | - pcm_chunks[0] += 4; |
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240 | | - pcm_chunks[1] += 4; |
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241 | | - } else { |
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242 | | - /* |
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243 | | - * Additional data chunks for ADAT on optical interface |
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244 | | - * A. |
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245 | | - */ |
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246 | | - pcm_chunks[0] += 8; |
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247 | | - pcm_chunks[1] += 4; |
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248 | | - } |
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249 | | - } |
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250 | | - |
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251 | | - if ((flags & SND_MOTU_SPEC_HAS_OPT_IFACE_B) && (data & b_enable_mask)) { |
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252 | | - if (data & b_no_adat_mask) { |
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253 | | - /* |
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254 | | - * Additional two data chunks for S/PDIF on optical |
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255 | | - * interface B. This includes empty data chunks. |
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256 | | - */ |
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257 | | - pcm_chunks[0] += 4; |
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258 | | - pcm_chunks[1] += 4; |
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259 | | - } else { |
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260 | | - /* |
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261 | | - * Additional data chunks for ADAT on optical interface |
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262 | | - * B. |
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263 | | - */ |
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264 | | - pcm_chunks[0] += 8; |
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265 | | - pcm_chunks[1] += 4; |
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266 | | - } |
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267 | | - } |
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268 | | - |
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269 | | - for (i = 0; i < 3; ++i) { |
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270 | | - if (pcm_chunks[i] > 0) |
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271 | | - pcm_chunks[i] = round_up(pcm_chunks[i], 4); |
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272 | | - |
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273 | | - formats->differed_part_pcm_chunks[i] = pcm_chunks[i]; |
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274 | | - } |
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275 | | -} |
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276 | | - |
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277 | | -static int v3_cache_packet_formats(struct snd_motu *motu) |
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| 262 | +int snd_motu_protocol_v3_cache_packet_formats(struct snd_motu *motu) |
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278 | 263 | { |
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279 | 264 | __be32 reg; |
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280 | 265 | u32 data; |
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281 | 266 | int err; |
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| 267 | + |
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| 268 | + motu->tx_packet_formats.pcm_byte_offset = 10; |
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| 269 | + motu->rx_packet_formats.pcm_byte_offset = 10; |
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| 270 | + |
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| 271 | + motu->tx_packet_formats.msg_chunks = 2; |
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| 272 | + motu->rx_packet_formats.msg_chunks = 2; |
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282 | 273 | |
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283 | 274 | err = snd_motu_transaction_read(motu, V3_OPT_IFACE_MODE_OFFSET, ®, |
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284 | 275 | sizeof(reg)); |
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.. | .. |
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286 | 277 | return err; |
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287 | 278 | data = be32_to_cpu(reg); |
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288 | 279 | |
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289 | | - calculate_fixed_part(&motu->tx_packet_formats, AMDTP_IN_STREAM, |
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290 | | - motu->spec->flags, motu->spec->analog_in_ports); |
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291 | | - calculate_differed_part(&motu->tx_packet_formats, |
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292 | | - motu->spec->flags, data, |
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293 | | - V3_ENABLE_OPT_IN_IFACE_A, V3_NO_ADAT_OPT_IN_IFACE_A, |
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294 | | - V3_ENABLE_OPT_IN_IFACE_B, V3_NO_ADAT_OPT_IN_IFACE_B); |
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| 280 | + memcpy(motu->tx_packet_formats.pcm_chunks, |
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| 281 | + motu->spec->tx_fixed_pcm_chunks, |
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| 282 | + sizeof(motu->tx_packet_formats.pcm_chunks)); |
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| 283 | + memcpy(motu->rx_packet_formats.pcm_chunks, |
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| 284 | + motu->spec->rx_fixed_pcm_chunks, |
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| 285 | + sizeof(motu->rx_packet_formats.pcm_chunks)); |
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295 | 286 | |
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296 | | - calculate_fixed_part(&motu->rx_packet_formats, AMDTP_OUT_STREAM, |
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297 | | - motu->spec->flags, motu->spec->analog_out_ports); |
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298 | | - calculate_differed_part(&motu->rx_packet_formats, |
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299 | | - motu->spec->flags, data, |
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300 | | - V3_ENABLE_OPT_OUT_IFACE_A, V3_NO_ADAT_OPT_OUT_IFACE_A, |
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301 | | - V3_ENABLE_OPT_OUT_IFACE_B, V3_NO_ADAT_OPT_OUT_IFACE_B); |
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302 | | - |
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303 | | - motu->tx_packet_formats.pcm_byte_offset = 10; |
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304 | | - motu->rx_packet_formats.pcm_byte_offset = 10; |
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305 | | - |
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306 | | - return 0; |
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| 287 | + if (motu->spec == &snd_motu_spec_828mk3) |
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| 288 | + return detect_packet_formats_828mk3(motu, data); |
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| 289 | + else |
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| 290 | + return 0; |
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307 | 291 | } |
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308 | 292 | |
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309 | | -const struct snd_motu_protocol snd_motu_protocol_v3 = { |
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310 | | - .get_clock_rate = v3_get_clock_rate, |
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311 | | - .set_clock_rate = v3_set_clock_rate, |
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312 | | - .get_clock_source = v3_get_clock_source, |
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313 | | - .switch_fetching_mode = v3_switch_fetching_mode, |
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314 | | - .cache_packet_formats = v3_cache_packet_formats, |
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| 293 | + |
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| 294 | +const struct snd_motu_spec snd_motu_spec_828mk3 = { |
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| 295 | + .name = "828mk3", |
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| 296 | + .protocol_version = SND_MOTU_PROTOCOL_V3, |
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| 297 | + .flags = SND_MOTU_SPEC_RX_MIDI_3RD_Q | |
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| 298 | + SND_MOTU_SPEC_TX_MIDI_3RD_Q, |
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| 299 | + .tx_fixed_pcm_chunks = {18, 18, 14}, |
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| 300 | + .rx_fixed_pcm_chunks = {14, 14, 10}, |
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| 301 | +}; |
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| 302 | + |
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| 303 | +const struct snd_motu_spec snd_motu_spec_ultralite_mk3 = { |
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| 304 | + .name = "UltraLiteMk3", |
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| 305 | + .protocol_version = SND_MOTU_PROTOCOL_V3, |
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| 306 | + .flags = SND_MOTU_SPEC_RX_MIDI_3RD_Q | |
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| 307 | + SND_MOTU_SPEC_TX_MIDI_3RD_Q, |
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| 308 | + .tx_fixed_pcm_chunks = {18, 14, 10}, |
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| 309 | + .rx_fixed_pcm_chunks = {14, 14, 14}, |
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| 310 | +}; |
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| 311 | + |
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| 312 | +const struct snd_motu_spec snd_motu_spec_audio_express = { |
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| 313 | + .name = "AudioExpress", |
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| 314 | + .protocol_version = SND_MOTU_PROTOCOL_V3, |
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| 315 | + .flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q | |
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| 316 | + SND_MOTU_SPEC_TX_MIDI_3RD_Q, |
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| 317 | + .tx_fixed_pcm_chunks = {10, 10, 0}, |
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| 318 | + .rx_fixed_pcm_chunks = {10, 10, 0}, |
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| 319 | +}; |
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| 320 | + |
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| 321 | +const struct snd_motu_spec snd_motu_spec_4pre = { |
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| 322 | + .name = "4pre", |
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| 323 | + .protocol_version = SND_MOTU_PROTOCOL_V3, |
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| 324 | + .tx_fixed_pcm_chunks = {10, 10, 0}, |
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| 325 | + .rx_fixed_pcm_chunks = {10, 10, 0}, |
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315 | 326 | }; |
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