修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/include/uapi/drm/nouveau_drm.h
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@@ -110,6 +110,7 @@
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 	__u64 push;
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 	__u32 suffix0;
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 	__u32 suffix1;
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+#define NOUVEAU_GEM_PUSHBUF_SYNC                                    (1ULL << 0)
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 	__u64 vram_available;
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 	__u64 gart_available;
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 };
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@@ -133,12 +134,63 @@
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 #define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC  0x05 /* deprecated */
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 #define DRM_NOUVEAU_GPUOBJ_FREE        0x06 /* deprecated */
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 #define DRM_NOUVEAU_NVIF               0x07
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+#define DRM_NOUVEAU_SVM_INIT           0x08
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+#define DRM_NOUVEAU_SVM_BIND           0x09
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 #define DRM_NOUVEAU_GEM_NEW            0x40
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 #define DRM_NOUVEAU_GEM_PUSHBUF        0x41
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 #define DRM_NOUVEAU_GEM_CPU_PREP       0x42
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 #define DRM_NOUVEAU_GEM_CPU_FINI       0x43
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 #define DRM_NOUVEAU_GEM_INFO           0x44
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+struct drm_nouveau_svm_init {
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+	__u64 unmanaged_addr;
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+	__u64 unmanaged_size;
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+};
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+
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+struct drm_nouveau_svm_bind {
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+	__u64 header;
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+	__u64 va_start;
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+	__u64 va_end;
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+	__u64 npages;
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+	__u64 stride;
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+	__u64 result;
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+	__u64 reserved0;
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+	__u64 reserved1;
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+};
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+
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+#define NOUVEAU_SVM_BIND_COMMAND_SHIFT          0
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+#define NOUVEAU_SVM_BIND_COMMAND_BITS           8
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+#define NOUVEAU_SVM_BIND_COMMAND_MASK           ((1 << 8) - 1)
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+#define NOUVEAU_SVM_BIND_PRIORITY_SHIFT         8
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+#define NOUVEAU_SVM_BIND_PRIORITY_BITS          8
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+#define NOUVEAU_SVM_BIND_PRIORITY_MASK          ((1 << 8) - 1)
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+#define NOUVEAU_SVM_BIND_TARGET_SHIFT           16
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+#define NOUVEAU_SVM_BIND_TARGET_BITS            32
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+#define NOUVEAU_SVM_BIND_TARGET_MASK            0xffffffff
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+
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+/*
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+ * Below is use to validate ioctl argument, userspace can also use it to make
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+ * sure that no bit are set beyond known fields for a given kernel version.
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+ */
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+#define NOUVEAU_SVM_BIND_VALID_BITS     48
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+#define NOUVEAU_SVM_BIND_VALID_MASK     ((1ULL << NOUVEAU_SVM_BIND_VALID_BITS) - 1)
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+
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+
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+/*
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+ * NOUVEAU_BIND_COMMAND__MIGRATE: synchronous migrate to target memory.
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+ * result: number of page successfuly migrate to the target memory.
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+ */
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+#define NOUVEAU_SVM_BIND_COMMAND__MIGRATE               0
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+
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+/*
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+ * NOUVEAU_SVM_BIND_HEADER_TARGET__GPU_VRAM: target the GPU VRAM memory.
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+ */
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+#define NOUVEAU_SVM_BIND_TARGET__GPU_VRAM               (1UL << 31)
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+
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+
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+#define DRM_IOCTL_NOUVEAU_SVM_INIT           DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_INIT, struct drm_nouveau_svm_init)
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+#define DRM_IOCTL_NOUVEAU_SVM_BIND           DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_BIND, struct drm_nouveau_svm_bind)
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+
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 #define DRM_IOCTL_NOUVEAU_GEM_NEW            DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new)
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 #define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF        DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, struct drm_nouveau_gem_pushbuf)
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 #define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP       DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep)