hc
2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5
kernel/include/uapi/drm/msm_drm.h
....@@ -74,6 +74,8 @@
7474 #define MSM_PARAM_TIMESTAMP 0x05
7575 #define MSM_PARAM_GMEM_BASE 0x06
7676 #define MSM_PARAM_NR_RINGS 0x07
77
+#define MSM_PARAM_PP_PGTABLE 0x08 /* => 1 for per-process pagetables, else 0 */
78
+#define MSM_PARAM_FAULTS 0x09
7779
7880 struct drm_msm_param {
7981 __u32 pipe; /* in, MSM_PIPE_x */
....@@ -105,14 +107,24 @@
105107 __u32 handle; /* out */
106108 };
107109
108
-#define MSM_INFO_IOVA 0x01
109
-
110
-#define MSM_INFO_FLAGS (MSM_INFO_IOVA)
110
+/* Get or set GEM buffer info. The requested value can be passed
111
+ * directly in 'value', or for data larger than 64b 'value' is a
112
+ * pointer to userspace buffer, with 'len' specifying the number of
113
+ * bytes copied into that buffer. For info returned by pointer,
114
+ * calling the GEM_INFO ioctl with null 'value' will return the
115
+ * required buffer size in 'len'
116
+ */
117
+#define MSM_INFO_GET_OFFSET 0x00 /* get mmap() offset, returned by value */
118
+#define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */
119
+#define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer) */
120
+#define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by pointer */
111121
112122 struct drm_msm_gem_info {
113123 __u32 handle; /* in */
114
- __u32 flags; /* in - combination of MSM_INFO_* flags */
115
- __u64 offset; /* out, mmap() offset or iova */
124
+ __u32 info; /* in - one of MSM_INFO_* */
125
+ __u64 value; /* in or out */
126
+ __u32 len; /* in or out */
127
+ __u32 pad;
116128 };
117129
118130 #define MSM_PREP_READ 0x01
....@@ -188,8 +200,11 @@
188200 */
189201 #define MSM_SUBMIT_BO_READ 0x0001
190202 #define MSM_SUBMIT_BO_WRITE 0x0002
203
+#define MSM_SUBMIT_BO_DUMP 0x0004
191204
192
-#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE)
205
+#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | \
206
+ MSM_SUBMIT_BO_WRITE | \
207
+ MSM_SUBMIT_BO_DUMP)
193208
194209 struct drm_msm_gem_submit_bo {
195210 __u32 flags; /* in, mask of MSM_SUBMIT_BO_x */
....@@ -202,12 +217,27 @@
202217 #define MSM_SUBMIT_FENCE_FD_IN 0x40000000 /* enable input fence_fd */
203218 #define MSM_SUBMIT_FENCE_FD_OUT 0x20000000 /* enable output fence_fd */
204219 #define MSM_SUBMIT_SUDO 0x10000000 /* run submitted cmds from RB */
220
+#define MSM_SUBMIT_SYNCOBJ_IN 0x08000000 /* enable input syncobj */
221
+#define MSM_SUBMIT_SYNCOBJ_OUT 0x04000000 /* enable output syncobj */
205222 #define MSM_SUBMIT_FLAGS ( \
206223 MSM_SUBMIT_NO_IMPLICIT | \
207224 MSM_SUBMIT_FENCE_FD_IN | \
208225 MSM_SUBMIT_FENCE_FD_OUT | \
209226 MSM_SUBMIT_SUDO | \
227
+ MSM_SUBMIT_SYNCOBJ_IN | \
228
+ MSM_SUBMIT_SYNCOBJ_OUT | \
210229 0)
230
+
231
+#define MSM_SUBMIT_SYNCOBJ_RESET 0x00000001 /* Reset syncobj after wait. */
232
+#define MSM_SUBMIT_SYNCOBJ_FLAGS ( \
233
+ MSM_SUBMIT_SYNCOBJ_RESET | \
234
+ 0)
235
+
236
+struct drm_msm_gem_submit_syncobj {
237
+ __u32 handle; /* in, syncobj handle. */
238
+ __u32 flags; /* in, from MSM_SUBMIT_SYNCOBJ_FLAGS */
239
+ __u64 point; /* in, timepoint for timeline syncobjs. */
240
+};
211241
212242 /* Each cmdstream submit consists of a table of buffers involved, and
213243 * one or more cmdstream buffers. This allows for conditional execution
....@@ -221,7 +251,14 @@
221251 __u64 bos; /* in, ptr to array of submit_bo's */
222252 __u64 cmds; /* in, ptr to array of submit_cmd's */
223253 __s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
224
- __u32 queueid; /* in, submitqueue id */
254
+ __u32 queueid; /* in, submitqueue id */
255
+ __u64 in_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
256
+ __u64 out_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
257
+ __u32 nr_in_syncobjs; /* in, number of entries in in_syncobj */
258
+ __u32 nr_out_syncobjs; /* in, number of entries in out_syncobj. */
259
+ __u32 syncobj_stride; /* in, stride of syncobj arrays. */
260
+ __u32 pad; /*in, reserved for future use, always 0. */
261
+
225262 };
226263
227264 /* The normal way to synchronize with the GPU is just to CPU_PREP on
....@@ -273,6 +310,16 @@
273310 __u32 id; /* out, identifier */
274311 };
275312
313
+#define MSM_SUBMITQUEUE_PARAM_FAULTS 0
314
+
315
+struct drm_msm_submitqueue_query {
316
+ __u64 data;
317
+ __u32 id;
318
+ __u32 param;
319
+ __u32 len;
320
+ __u32 pad;
321
+};
322
+
276323 #define DRM_MSM_GET_PARAM 0x00
277324 /* placeholder:
278325 #define DRM_MSM_SET_PARAM 0x01
....@@ -289,6 +336,7 @@
289336 */
290337 #define DRM_MSM_SUBMITQUEUE_NEW 0x0A
291338 #define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
339
+#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C
292340
293341 #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
294342 #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
....@@ -300,6 +348,7 @@
300348 #define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise)
301349 #define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue)
302350 #define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
351
+#define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query)
303352
304353 #if defined(__cplusplus)
305354 }