修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/include/drm/bridge/dw_hdmi.h
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@@ -1,19 +1,22 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /*
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  * Copyright (C) 2011 Freescale Semiconductor, Inc.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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  */
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 #ifndef __DW_HDMI__
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 #define __DW_HDMI__
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8
 
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-#include <drm/drmP.h>
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+#include <drm/drm_property.h>
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+#include <drm/drm_crtc.h>
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 #include <sound/hdmi-codec.h>
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+#include <media/cec.h>
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13
 
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+struct drm_display_info;
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+struct drm_display_mode;
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+struct drm_encoder;
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 struct dw_hdmi;
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+struct dw_hdmi_qp;
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+struct platform_device;
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 /**
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  * DOC: Supported input formats and encodings
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@@ -76,6 +79,8 @@
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  * +----------------------+----------------------------------+------------------------------+
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  */
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+#define SUPPORT_HDMI_ALLM	BIT(1)
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+
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 enum {
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 	DW_HDMI_RES_8,
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 	DW_HDMI_RES_10,
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@@ -91,6 +96,13 @@
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 	DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2,
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 	DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3,
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 	DW_HDMI_PHY_VENDOR_PHY = 0xfe,
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+};
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+
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+struct dw_hdmi_audio_frl_n {
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+	unsigned int r_bit;
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+	unsigned int n_32k;
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+	unsigned int n_44k1;
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+	unsigned int n_48k;
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 };
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 struct dw_hdmi_audio_tmds_n {
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@@ -120,9 +132,20 @@
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 	u16 vlev_ctr;   /* voltage level control */
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 };
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+struct dw_hdmi_link_config {
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+	bool dsc_mode;
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+	bool frl_mode;
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+	int frl_lanes;
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+	int rate_per_lane;
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+	int hcactive;
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+	u8 add_func;
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+	u8 pps_payload[128];
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+};
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+
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 struct dw_hdmi_phy_ops {
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 	int (*init)(struct dw_hdmi *hdmi, void *data,
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-		    struct drm_display_mode *mode);
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+		    const struct drm_display_info *display,
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+		    const struct drm_display_mode *mode);
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 	void (*disable)(struct dw_hdmi *hdmi, void *data);
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 	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
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 	void (*update_hpd)(struct dw_hdmi *hdmi, void *data,
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@@ -130,10 +153,23 @@
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 	void (*setup_hpd)(struct dw_hdmi *hdmi, void *data);
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 };
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+struct dw_hdmi_qp_phy_ops {
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+	int (*init)(struct dw_hdmi_qp *hdmi, void *data,
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+		    struct drm_display_mode *mode);
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+	void (*disable)(struct dw_hdmi_qp *hdmi, void *data);
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+	enum drm_connector_status (*read_hpd)(struct dw_hdmi_qp *hdmi,
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+					      void *data);
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+	void (*update_hpd)(struct dw_hdmi_qp *hdmi, void *data,
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+			   bool force, bool disabled, bool rxsense);
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+	void (*setup_hpd)(struct dw_hdmi_qp *hdmi, void *data);
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+	void (*set_mode)(struct dw_hdmi_qp *dw_hdmi, void *data,
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+			 u32 mode_mask, bool enable);
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+};
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+
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 struct dw_hdmi_property_ops {
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 	void (*attach_properties)(struct drm_connector *connector,
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 				  unsigned int color, int version,
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-				  void *data);
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+				  void *data, bool allm_en);
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 	void (*destroy_properties)(struct drm_connector *connector,
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 				   void *data);
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 	int (*set_property)(struct drm_connector *connector,
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@@ -150,26 +186,48 @@
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 struct dw_hdmi_plat_data {
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 	struct regmap *regm;
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-	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
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-					   const struct drm_display_mode *mode);
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+
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 	unsigned long input_bus_format;
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 	unsigned long input_bus_encoding;
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+	unsigned int max_tmdsclk;
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+	int id;
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+	bool use_drm_infoframe;
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 	bool ycbcr_420_allowed;
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+	bool unsupported_yuv_input;
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+	bool unsupported_deep_color;
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+	bool is_hdmi_qp;
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+
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+	/*
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+	 * Private data passed to all the .mode_valid() and .configure_phy()
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+	 * callback functions.
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+	 */
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+	void *priv_data;
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+
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+	/* Platform-specific mode validation (optional). */
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+	enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data,
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+					   const struct drm_display_info *info,
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+					   const struct drm_display_mode *mode);
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 	/* Vendor PHY support */
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 	const struct dw_hdmi_phy_ops *phy_ops;
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+	const struct dw_hdmi_qp_phy_ops *qp_phy_ops;
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 	const char *phy_name;
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 	void *phy_data;
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 	unsigned int phy_force_vendor;
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-        const struct dw_hdmi_audio_tmds_n *tmds_n_table;
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+	const struct dw_hdmi_audio_tmds_n *tmds_n_table;
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+
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+	/* split mode */
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+	bool split_mode;
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+	bool first_screen;
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+	struct dw_hdmi_qp *left;
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+	struct dw_hdmi_qp *right;
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 	/* Synopsys PHY support */
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 	const struct dw_hdmi_mpll_config *mpll_cfg;
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 	const struct dw_hdmi_mpll_config *mpll_cfg_420;
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 	const struct dw_hdmi_curr_ctrl *cur_ctr;
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 	const struct dw_hdmi_phy_config *phy_config;
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-	int (*configure_phy)(struct dw_hdmi *hdmi,
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-			     const struct dw_hdmi_plat_data *pdata,
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+	int (*configure_phy)(struct dw_hdmi *hdmi, void *data,
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 			     unsigned long mpixelclock);
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 	unsigned long (*get_input_bus_format)(void *data);
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@@ -180,10 +238,36 @@
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 	struct drm_property *(*get_hdr_property)(void *data);
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 	struct drm_property_blob *(*get_hdr_blob)(void *data);
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 	bool (*get_color_changed)(void *data);
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+	int (*get_yuv422_format)(struct drm_connector *connector,
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+				 struct edid *edid);
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+	int (*get_edid_dsc_info)(void *data, struct edid *edid);
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+	int (*get_next_hdr_data)(void *data, struct edid *edid,
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+				 struct drm_connector *connector);
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+	struct dw_hdmi_link_config *(*get_link_cfg)(void *data);
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+	void (*set_hdcp_status)(void *data, u8 status);
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+	void (*set_hdcp2_enable)(void *data, bool enable);
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+	void (*set_grf_cfg)(void *data);
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+	u64 (*get_grf_color_fmt)(void *data);
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+	void (*convert_to_split_mode)(struct drm_display_mode *mode);
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+	void (*convert_to_origin_mode)(struct drm_display_mode *mode);
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+	int (*dclk_set)(void *data, bool enable, int vp_id);
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+	int (*link_clk_set)(void *data, bool enable);
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+	int (*get_vp_id)(struct drm_crtc_state *crtc_state);
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+	void (*update_color_format)(struct drm_connector_state *conn_state, void *data);
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+	bool (*check_hdr_color_change)(struct drm_connector_state *conn_state, void *data);
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+	void (*set_prev_bus_format)(void *data, unsigned long bus_format);
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+	int (*get_colorimetry)(void *data, struct edid *edid);
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+	void (*set_ddc_io)(void *data, bool enable);
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+	void (*set_hdcp14_mem)(void *data, bool enable);
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 	/* Vendor Property support */
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 	const struct dw_hdmi_property_ops *property_ops;
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 	struct drm_connector *connector;
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+	struct drm_bridge *bridge;
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+};
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+
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+struct dw_hdmi_cec_wake_ops {
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+	void (*hpd_wake_up)(struct platform_device *pdev);
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 };
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 struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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@@ -193,17 +277,22 @@
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 struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev,
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 			     struct drm_encoder *encoder,
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 			     struct dw_hdmi_plat_data *plat_data);
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-void dw_hdmi_suspend(struct device *dev, struct dw_hdmi *hdmi);
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-void dw_hdmi_resume(struct device *dev, struct dw_hdmi *hdmi);
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+
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+void dw_hdmi_suspend(struct dw_hdmi *hdmi);
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+void dw_hdmi_resume(struct dw_hdmi *hdmi);
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 void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
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 int dw_hdmi_set_plugged_cb(struct dw_hdmi *hdmi, hdmi_codec_plugged_cb fn,
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 			   struct device *codec_dev);
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 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
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+void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt);
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+void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi, u8 *channel_status);
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+void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca);
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 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
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 void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
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-void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi);
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+void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi,
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+				       const struct drm_display_info *display);
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 /* PHY configuration */
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 void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address);
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@@ -223,5 +312,37 @@
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 void dw_hdmi_set_output_type(struct dw_hdmi *hdmi, u64 val);
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 bool dw_hdmi_get_output_whether_hdmi(struct dw_hdmi *hdmi);
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 int dw_hdmi_get_output_type_cap(struct dw_hdmi *hdmi);
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+void dw_hdmi_set_cec_adap(struct dw_hdmi *hdmi, struct cec_adapter *adap);
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+void dw_hdmi_qp_set_allm_enable(struct dw_hdmi_qp *hdmi_qp, bool enable);
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+
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+void dw_hdmi_qp_unbind(struct dw_hdmi_qp *hdmi);
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+struct dw_hdmi_qp *dw_hdmi_qp_bind(struct platform_device *pdev,
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+				struct drm_encoder *encoder,
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+				struct dw_hdmi_plat_data *plat_data);
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+void dw_hdmi_qp_suspend(struct device *dev, struct dw_hdmi_qp *hdmi);
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+void dw_hdmi_qp_resume(struct device *dev, struct dw_hdmi_qp *hdmi);
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+void dw_hdmi_qp_cec_set_hpd(struct dw_hdmi_qp *hdmi, bool plug_in, bool change);
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+void dw_hdmi_qp_set_cec_adap(struct dw_hdmi_qp *hdmi, struct cec_adapter *adap);
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+int dw_hdmi_qp_set_earc(struct dw_hdmi_qp *hdmi);
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+void dw_hdmi_qp_set_sample_rate(struct dw_hdmi_qp *hdmi, unsigned int rate);
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+void dw_hdmi_qp_set_channel_count(struct dw_hdmi_qp *hdmi, unsigned int cnt);
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+void dw_hdmi_qp_set_channel_status(struct dw_hdmi_qp *hdmi, u8 *channel_status,
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+				   bool ref2stream);
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+void dw_hdmi_qp_set_channel_allocation(struct dw_hdmi_qp *hdmi, unsigned int ca);
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+void dw_hdmi_qp_set_audio_interface(struct dw_hdmi_qp *hdmi,
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+				    struct hdmi_codec_daifmt *fmt,
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+				    struct hdmi_codec_params *hparms);
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+void dw_hdmi_qp_set_audio_infoframe(struct dw_hdmi_qp *hdmi,
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+				    struct hdmi_codec_params *hparms);
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+void dw_hdmi_qp_audio_enable(struct dw_hdmi_qp *hdmi);
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+void dw_hdmi_qp_audio_disable(struct dw_hdmi_qp *hdmi);
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+int dw_hdmi_qp_set_plugged_cb(struct dw_hdmi_qp *hdmi, hdmi_codec_plugged_cb fn,
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+			      struct device *codec_dev);
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+void dw_hdmi_qp_set_output_type(struct dw_hdmi_qp *hdmi, u64 val);
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+bool dw_hdmi_qp_get_output_whether_hdmi(struct dw_hdmi_qp *hdmi);
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+int dw_hdmi_qp_get_output_type_cap(struct dw_hdmi_qp *hdmi);
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+void dw_hdmi_set_hpd_wake(struct dw_hdmi *hdmi);
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+void dw_hdmi_cec_wake_ops_register(struct dw_hdmi *hdmi,
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+				   const struct dw_hdmi_cec_wake_ops *cec_ops);
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 #endif /* __IMX_HDMI_H__ */