修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/drivers/net/wireless/intel/iwlwifi/iwl-fh.h
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@@ -7,7 +7,7 @@
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  *
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  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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  * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
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- * Copyright(c) 2018 Intel Corporation
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+ * Copyright(c) 2018 - 2020 Intel Corporation
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  *
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  * This program is free software; you can redistribute it and/or modify
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  * it under the terms of version 2 of the GNU General Public License as
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@@ -17,9 +17,6 @@
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  * WITHOUT ANY WARRANTY; without even the implied warranty of
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  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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  * General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.
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  *
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  * The full GNU General Public License is included in this distribution
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  * in the file called COPYING.
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@@ -32,7 +29,7 @@
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  *
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  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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  * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
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- * Copyright(c) 2018 Intel Corporation
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+ * Copyright(c) 2018 - 2020 Intel Corporation
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  * All rights reserved.
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  *
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  * Redistribution and use in source and binary forms, with or without
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@@ -67,6 +64,8 @@
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 #include <linux/types.h>
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 #include <linux/bitfield.h>
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+
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+#include "iwl-trans.h"
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 /****************************/
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 /* Flow Handler Definitions */
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@@ -128,7 +127,7 @@
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 static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans,
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 					     unsigned int chnl)
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 {
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-	if (trans->cfg->use_tfh) {
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+	if (trans->trans_cfg->use_tfh) {
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 		WARN_ON_ONCE(chnl >= 64);
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 		return TFH_TFDQ_CBB_TABLE + 8 * chnl;
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 	}
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@@ -149,7 +148,7 @@
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  *
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  * Bits 3:0:
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  * Define the maximum number of pending read requests.
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- * Maximum configration value allowed is 0xC
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+ * Maximum configuration value allowed is 0xC
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  * Bits 9:8:
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  * Define the maximum transfer size. (64 / 128 / 256)
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  * Bit 10:
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@@ -612,10 +611,7 @@
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  */
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 #define FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN	(0x00000002)
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-#define MQ_RX_TABLE_SIZE	512
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-#define MQ_RX_TABLE_MASK	(MQ_RX_TABLE_SIZE - 1)
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-#define MQ_RX_NUM_RBDS		(MQ_RX_TABLE_SIZE - 1)
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-#define RX_POOL_SIZE		(MQ_RX_NUM_RBDS +	\
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+#define RX_POOL_SIZE(rbds)	((rbds) - 1 +	\
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 				 IWL_MAX_RX_HW_QUEUES *	\
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 				 (RX_CLAIM_REQ_ALLOC - RX_POST_REQ_ALLOC))
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 /* cb size is the exponent */
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@@ -650,8 +646,7 @@
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 #define TFD_QUEUE_CB_SIZE(x)	(ilog2(x) - 3)
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 #define TFD_QUEUE_SIZE_BC_DUP	(64)
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 #define TFD_QUEUE_BC_SIZE	(TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP)
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-#define TFD_QUEUE_BC_SIZE_GEN3	(TFD_QUEUE_SIZE_MAX_GEN3 + \
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-				 TFD_QUEUE_SIZE_BC_DUP)
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+#define TFD_QUEUE_BC_SIZE_GEN3	1024
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 #define IWL_TX_DMA_MASK        DMA_BIT_MASK(36)
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 #define IWL_NUM_OF_TBS		20
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 #define IWL_TFH_NUM_TBS		25
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@@ -769,7 +764,7 @@
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 /**
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  * struct iwl_gen3_bc_tbl scheduler byte count table gen3
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- * For 22560 and on:
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+ * For AX210 and on:
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  * @tfd_offset: 0-12 - tx command byte count
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  *		12-13 - number of 64 byte chunks
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  *		14-16 - reserved