修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/drivers/net/wireless/intel/iwlwifi/cfg/22000.c
..
..
@@ -6,7 +6,7 @@
6
6
  * GPL LICENSE SUMMARY
7
7
  *
8
8
  * Copyright(c) 2015-2017 Intel Deutschland GmbH
9
- * Copyright (C) 2018 Intel Corporation
9
+ * Copyright (C) 2018-2020 Intel Corporation
10
10
  *
11
11
  * This program is free software; you can redistribute it and/or modify
12
12
  * it under the terms of version 2 of the GNU General Public License as
..
..
@@ -20,7 +20,7 @@
20
20
  * BSD LICENSE
21
21
  *
22
22
  * Copyright(c) 2015-2017 Intel Deutschland GmbH
23
- * Copyright (C) 2018 Intel Corporation
23
+ * Copyright (C) 2018-2020 Intel Corporation
24
24
  * All rights reserved.
25
25
  *
26
26
  * Redistribution and use in source and binary forms, with or without
..
..
@@ -54,16 +54,16 @@
54
54
 #include <linux/module.h>
55
55
 #include <linux/stringify.h>
56
56
 #include "iwl-config.h"
57
+#include "iwl-prph.h"
57
58
 
58
59
 /* Highest firmware API version supported */
59
-#define IWL_22000_UCODE_API_MAX	38
60
+#define IWL_22000_UCODE_API_MAX	59
60
61
 
61
62
 /* Lowest firmware API version supported */
62
63
 #define IWL_22000_UCODE_API_MIN	39
63
64
 
64
65
 /* NVM versions */
65
66
 #define IWL_22000_NVM_VERSION		0x0a1d
66
-#define IWL_22000_TX_POWER_VERSION	0xffff /* meaningless */
67
67
 
68
68
 /* Memory offsets and lengths */
69
69
 #define IWL_22000_DCCM_OFFSET		0x800000 /* LMAC1 */
..
..
@@ -73,43 +73,66 @@
73
73
 #define IWL_22000_SMEM_OFFSET		0x400000
74
74
 #define IWL_22000_SMEM_LEN		0xD0000
75
75
 
76
-#define IWL_22000_JF_FW_PRE		"iwlwifi-Qu-a0-jf-b0-"
77
-#define IWL_22000_HR_FW_PRE		"iwlwifi-Qu-a0-hr-a0-"
78
-#define IWL_22000_HR_CDB_FW_PRE		"iwlwifi-QuIcp-z0-hrcdb-a0-"
79
-#define IWL_22000_HR_A_F0_FW_PRE	"iwlwifi-QuQnj-f0-hr-a0-"
80
-#define IWL_22000_HR_B_F0_FW_PRE	"iwlwifi-Qu-b0-hr-b0-"
81
-#define IWL_22000_QU_B_HR_B_FW_PRE	"iwlwifi-Qu-b0-hr-b0-"
82
-#define IWL_22000_HR_B_FW_PRE		"iwlwifi-QuQnj-b0-hr-b0-"
83
-#define IWL_22000_JF_B0_FW_PRE		"iwlwifi-QuQnj-a0-jf-b0-"
84
-#define IWL_22000_HR_A0_FW_PRE		"iwlwifi-QuQnj-a0-hr-a0-"
85
-#define IWL_22000_SU_Z0_FW_PRE		"iwlwifi-su-z0-"
76
+#define IWL_QU_B_HR_B_FW_PRE		"iwlwifi-Qu-b0-hr-b0-"
77
+#define IWL_QNJ_B_HR_B_FW_PRE		"iwlwifi-QuQnj-b0-hr-b0-"
78
+#define IWL_QU_C_HR_B_FW_PRE		"iwlwifi-Qu-c0-hr-b0-"
86
79
 #define IWL_QU_B_JF_B_FW_PRE		"iwlwifi-Qu-b0-jf-b0-"
80
+#define IWL_QU_C_JF_B_FW_PRE		"iwlwifi-Qu-c0-jf-b0-"
81
+#define IWL_QUZ_A_HR_B_FW_PRE		"iwlwifi-QuZ-a0-hr-b0-"
82
+#define IWL_QUZ_A_JF_B_FW_PRE		"iwlwifi-QuZ-a0-jf-b0-"
83
+#define IWL_QNJ_B_JF_B_FW_PRE		"iwlwifi-QuQnj-b0-jf-b0-"
84
+#define IWL_CC_A_FW_PRE			"iwlwifi-cc-a0-"
85
+#define IWL_SO_A_JF_B_FW_PRE		"iwlwifi-so-a0-jf-b0-"
86
+#define IWL_SO_A_HR_B_FW_PRE		"iwlwifi-so-a0-hr-b0-"
87
+#define IWL_SO_A_GF_A_FW_PRE		"iwlwifi-so-a0-gf-a0-"
88
+#define IWL_TY_A_GF_A_FW_PRE		"iwlwifi-ty-a0-gf-a0-"
89
+#define IWL_SO_A_GF4_A_FW_PRE		"iwlwifi-so-a0-gf4-a0-"
90
+#define IWL_SNJ_A_GF4_A_FW_PRE		"iwlwifi-SoSnj-a0-gf4-a0-"
91
+#define IWL_SNJ_A_GF_A_FW_PRE		"iwlwifi-SoSnj-a0-gf-a0-"
92
+#define IWL_SNJ_A_HR_B_FW_PRE		"iwlwifi-SoSnj-a0-hr-b0-"
93
+#define IWL_MA_A_GF_A_FW_PRE		"iwlwifi-ma-a0-gf-a0-"
94
+#define IWL_MA_A_MR_A_FW_PRE		"iwlwifi-ma-a0-mr-a0-"
95
+#define IWL_SNJ_A_MR_A_FW_PRE		"iwlwifi-SoSnj-a0-mr-a0-"
87
96
 
88
-#define IWL_22000_HR_MODULE_FIRMWARE(api) \
89
-	IWL_22000_HR_FW_PRE __stringify(api) ".ucode"
90
-#define IWL_22000_JF_MODULE_FIRMWARE(api) \
91
-	IWL_22000_JF_FW_PRE __stringify(api) ".ucode"
92
-#define IWL_22000_HR_A_F0_QNJ_MODULE_FIRMWARE(api) \
93
-	IWL_22000_HR_A_F0_FW_PRE __stringify(api) ".ucode"
94
-#define IWL_22000_HR_B_F0_QNJ_MODULE_FIRMWARE(api) \
95
-	IWL_22000_HR_B_F0_FW_PRE __stringify(api) ".ucode"
96
-#define IWL_22000_QU_B_HR_B_MODULE_FIRMWARE(api) \
97
-	IWL_22000_QU_B_HR_B_FW_PRE __stringify(api) ".ucode"
98
-#define IWL_22000_HR_B_QNJ_MODULE_FIRMWARE(api)	\
99
-	IWL_22000_HR_B_FW_PRE __stringify(api) ".ucode"
100
-#define IWL_22000_JF_B0_QNJ_MODULE_FIRMWARE(api) \
101
-	IWL_22000_JF_B0_FW_PRE __stringify(api) ".ucode"
102
-#define IWL_22000_HR_A0_QNJ_MODULE_FIRMWARE(api) \
103
-	IWL_22000_HR_A0_FW_PRE __stringify(api) ".ucode"
104
-#define IWL_22000_SU_Z0_MODULE_FIRMWARE(api) \
105
-	IWL_22000_SU_Z0_FW_PRE __stringify(api) ".ucode"
97
+#define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \
98
+	IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode"
99
+#define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api)	\
100
+	IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode"
101
+#define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \
102
+	IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode"
103
+#define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \
104
+	IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode"
105
+#define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \
106
+	IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode"
106
107
 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \
107
108
 	IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode"
108
-
109
-#define NVM_HW_SECTION_NUM_FAMILY_22000		10
109
+#define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api)		\
110
+	IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode"
111
+#define IWL_CC_A_MODULE_FIRMWARE(api)			\
112
+	IWL_CC_A_FW_PRE __stringify(api) ".ucode"
113
+#define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \
114
+	IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode"
115
+#define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \
116
+	IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode"
117
+#define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \
118
+	IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode"
119
+#define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \
120
+	IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode"
121
+#define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \
122
+	IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode"
123
+#define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \
124
+	IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode"
125
+#define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \
126
+	IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode"
127
+#define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \
128
+	IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode"
129
+#define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \
130
+	IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode"
131
+#define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \
132
+	IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode"
110
133
 
111
134
 static const struct iwl_base_params iwl_22000_base_params = {
112
-	.eeprom_size = OTP_LOW_IMAGE_SIZE_FAMILY_22000,
135
+	.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
113
136
 	.num_of_queues = 512,
114
137
 	.max_tfd_queue_size = 256,
115
138
 	.shadow_ram_support = true,
..
..
@@ -120,8 +143,8 @@
120
143
 	.pcie_l1_allowed = true,
121
144
 };
122
145
 
123
-static const struct iwl_base_params iwl_22560_base_params = {
124
-	.eeprom_size = OTP_LOW_IMAGE_SIZE_FAMILY_22000,
146
+static const struct iwl_base_params iwl_ax210_base_params = {
147
+	.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
125
148
 	.num_of_queues = 512,
126
149
 	.max_tfd_queue_size = 65536,
127
150
 	.shadow_ram_support = true,
..
..
@@ -142,7 +165,7 @@
142
165
 	.ucode_api_max = IWL_22000_UCODE_API_MAX,			\
143
166
 	.ucode_api_min = IWL_22000_UCODE_API_MIN,			\
144
167
 	.led_mode = IWL_LED_RF_STATE,					\
145
-	.nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_22000,		\
168
+	.nvm_hw_section_num = 10,					\
146
169
 	.non_shared_ant = ANT_B,					\
147
170
 	.dccm_offset = IWL_22000_DCCM_OFFSET,				\
148
171
 	.dccm_len = IWL_22000_DCCM_LEN,					\
..
..
@@ -152,101 +175,146 @@
152
175
 	.smem_len = IWL_22000_SMEM_LEN,					\
153
176
 	.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,		\
154
177
 	.apmg_not_supported = true,					\
155
-	.mq_rx_supported = true,					\
178
+	.trans.mq_rx_supported = true,					\
156
179
 	.vht_mu_mimo_supported = true,					\
157
180
 	.mac_addr_from_csr = true,					\
158
181
 	.ht_params = &iwl_22000_ht_params,				\
159
182
 	.nvm_ver = IWL_22000_NVM_VERSION,				\
160
-	.nvm_calib_ver = IWL_22000_TX_POWER_VERSION,			\
161
183
 	.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,		\
162
-	.use_tfh = true,						\
163
-	.rf_id = true,							\
164
-	.gen2 = true,							\
184
+	.trans.use_tfh = true,						\
185
+	.trans.rf_id = true,						\
186
+	.trans.gen2 = true,						\
165
187
 	.nvm_type = IWL_NVM_EXT,					\
166
188
 	.dbgc_supported = true,						\
167
-	.min_umac_error_event_table = 0x400000
189
+	.min_umac_error_event_table = 0x400000,				\
190
+	.d3_debug_data_base_addr = 0x401000,				\
191
+	.d3_debug_data_length = 60 * 1024,				\
192
+	.mon_smem_regs = {						\
193
+		.write_ptr = {						\
194
+			.addr = LDBG_M2S_BUF_WPTR,			\
195
+			.mask = LDBG_M2S_BUF_WPTR_VAL_MSK,		\
196
+	},								\
197
+		.cycle_cnt = {						\
198
+			.addr = LDBG_M2S_BUF_WRAP_CNT,			\
199
+			.mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK,		\
200
+		},							\
201
+	}
168
202
 
169
203
 #define IWL_DEVICE_22500						\
170
204
 	IWL_DEVICE_22000_COMMON,					\
171
-	.device_family = IWL_DEVICE_FAMILY_22000,			\
172
-	.base_params = &iwl_22000_base_params,				\
173
-	.csr = &iwl_csr_v1
205
+	.trans.device_family = IWL_DEVICE_FAMILY_22000,			\
206
+	.trans.base_params = &iwl_22000_base_params,			\
207
+	.gp2_reg_addr = 0xa02c68,					\
208
+	.mon_dram_regs = {						\
209
+		.write_ptr = {						\
210
+			.addr = MON_BUFF_WRPTR_VER2,			\
211
+			.mask = 0xffffffff,				\
212
+		},							\
213
+		.cycle_cnt = {						\
214
+			.addr = MON_BUFF_CYCLE_CNT_VER2,		\
215
+			.mask = 0xffffffff,				\
216
+		},							\
217
+	}
174
218
 
175
-#define IWL_DEVICE_22560						\
219
+#define IWL_DEVICE_AX210						\
176
220
 	IWL_DEVICE_22000_COMMON,					\
177
-	.device_family = IWL_DEVICE_FAMILY_22560,			\
178
-	.base_params = &iwl_22560_base_params,				\
179
-	.csr = &iwl_csr_v2
221
+	.trans.umac_prph_offset = 0x300000,				\
222
+	.trans.device_family = IWL_DEVICE_FAMILY_AX210,			\
223
+	.trans.base_params = &iwl_ax210_base_params,			\
224
+	.min_txq_size = 128,						\
225
+	.gp2_reg_addr = 0xd02c68,					\
226
+	.min_256_ba_txq_size = 1024,					\
227
+	.mon_dram_regs = {						\
228
+		.write_ptr = {						\
229
+			.addr = DBGC_CUR_DBGBUF_STATUS,			\
230
+			.mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK,	\
231
+		},							\
232
+		.cycle_cnt = {						\
233
+			.addr = DBGC_DBGBUF_WRAP_AROUND,		\
234
+			.mask = 0xffffffff,				\
235
+		},							\
236
+		.cur_frag = {						\
237
+			.addr = DBGC_CUR_DBGBUF_STATUS,			\
238
+			.mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK,		\
239
+		},							\
240
+	}
180
241
 
181
-const struct iwl_cfg iwl22000_2ac_cfg_hr = {
182
-	.name = "Intel(R) Dual Band Wireless AC 22000",
183
-	.fw_name_pre = IWL_22000_HR_FW_PRE,
184
-	IWL_DEVICE_22500,
242
+const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = {
243
+	.mq_rx_supported = true,
244
+	.use_tfh = true,
245
+	.rf_id = true,
246
+	.gen2 = true,
247
+	.device_family = IWL_DEVICE_FAMILY_22000,
248
+	.base_params = &iwl_22000_base_params,
185
249
 };
186
250
 
187
-const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb = {
188
-	.name = "Intel(R) Dual Band Wireless AC 22000",
189
-	.fw_name_pre = IWL_22000_HR_CDB_FW_PRE,
190
-	IWL_DEVICE_22500,
191
-	.cdb = true,
251
+const struct iwl_cfg_trans_params iwl_qu_trans_cfg = {
252
+	.mq_rx_supported = true,
253
+	.use_tfh = true,
254
+	.rf_id = true,
255
+	.gen2 = true,
256
+	.device_family = IWL_DEVICE_FAMILY_22000,
257
+	.base_params = &iwl_22000_base_params,
258
+	.integrated = true,
259
+	.xtal_latency = 500,
260
+	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US,
192
261
 };
193
262
 
194
-const struct iwl_cfg iwl22000_2ac_cfg_jf = {
195
-	.name = "Intel(R) Dual Band Wireless AC 22000",
196
-	.fw_name_pre = IWL_22000_JF_FW_PRE,
197
-	IWL_DEVICE_22500,
263
+const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = {
264
+	.mq_rx_supported = true,
265
+	.use_tfh = true,
266
+	.rf_id = true,
267
+	.gen2 = true,
268
+	.device_family = IWL_DEVICE_FAMILY_22000,
269
+	.base_params = &iwl_22000_base_params,
270
+	.integrated = true,
271
+	.xtal_latency = 1820,
272
+	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US,
198
273
 };
199
274
 
200
-const struct iwl_cfg iwl22000_2ax_cfg_hr = {
201
-	.name = "Intel(R) Dual Band Wireless AX 22000",
202
-	.fw_name_pre = IWL_22000_QU_B_HR_B_FW_PRE,
203
-	IWL_DEVICE_22500,
204
-	/*
205
-	 * This device doesn't support receiving BlockAck with a large bitmap
206
-	 * so we need to restrict the size of transmitted aggregation to the
207
-	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
208
-	 */
209
-	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
275
+const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = {
276
+	.mq_rx_supported = true,
277
+	.use_tfh = true,
278
+	.rf_id = true,
279
+	.gen2 = true,
280
+	.device_family = IWL_DEVICE_FAMILY_22000,
281
+	.base_params = &iwl_22000_base_params,
282
+	.integrated = true,
283
+	.xtal_latency = 12000,
284
+	.low_latency_xtal = true,
285
+	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
210
286
 };
287
+
288
+/*
289
+ * If the device doesn't support HE, no need to have that many buffers.
290
+ * 22000 devices can split multiple frames into a single RB, so fewer are
291
+ * needed; AX210 cannot (but use smaller RBs by default) - these sizes
292
+ * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with
293
+ * additional overhead to account for processing time.
294
+ */
295
+#define IWL_NUM_RBDS_NON_HE		512
296
+#define IWL_NUM_RBDS_22000_HE		2048
297
+#define IWL_NUM_RBDS_AX210_HE		4096
211
298
 
212
299
 /*
213
300
  * All JF radio modules are part of the 9000 series, but the MAC part
214
301
  * looks more like 22000.  That's why this device is here, but called
215
302
  * 9560 nevertheless.
216
303
  */
217
-const struct iwl_cfg iwl9461_2ac_cfg_qu_b0_jf_b0 = {
218
-	.name = "Intel(R) Wireless-AC 9461",
304
+const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = {
219
305
 	.fw_name_pre = IWL_QU_B_JF_B_FW_PRE,
220
306
 	IWL_DEVICE_22500,
307
+	.num_rbds = IWL_NUM_RBDS_NON_HE,
221
308
 };
222
309
 
223
-const struct iwl_cfg iwl9462_2ac_cfg_qu_b0_jf_b0 = {
224
-	.name = "Intel(R) Wireless-AC 9462",
225
-	.fw_name_pre = IWL_QU_B_JF_B_FW_PRE,
310
+const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = {
311
+	.fw_name_pre = IWL_QU_C_JF_B_FW_PRE,
226
312
 	IWL_DEVICE_22500,
313
+	.num_rbds = IWL_NUM_RBDS_NON_HE,
227
314
 };
228
315
 
229
-const struct iwl_cfg iwl9560_2ac_cfg_qu_b0_jf_b0 = {
230
-	.name = "Intel(R) Wireless-AC 9560",
231
-	.fw_name_pre = IWL_QU_B_JF_B_FW_PRE,
232
-	IWL_DEVICE_22500,
233
-};
234
-
235
-const struct iwl_cfg killer1550i_2ac_cfg_qu_b0_jf_b0 = {
236
-	.name = "Killer (R) Wireless-AC 1550i Wireless Network Adapter (9560NGW)",
237
-	.fw_name_pre = IWL_QU_B_JF_B_FW_PRE,
238
-	IWL_DEVICE_22500,
239
-};
240
-
241
-const struct iwl_cfg killer1550s_2ac_cfg_qu_b0_jf_b0 = {
242
-	.name = "Killer (R) Wireless-AC 1550s Wireless Network Adapter (9560NGW)",
243
-	.fw_name_pre = IWL_QU_B_JF_B_FW_PRE,
244
-	IWL_DEVICE_22500,
245
-};
246
-
247
-const struct iwl_cfg iwl22000_2ax_cfg_jf = {
248
-	.name = "Intel(R) Dual Band Wireless AX 22000",
249
-	.fw_name_pre = IWL_QU_B_JF_B_FW_PRE,
316
+const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = {
317
+	.fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE,
250
318
 	IWL_DEVICE_22500,
251
319
 	/*
252
320
 	 * This device doesn't support receiving BlockAck with a large bitmap
..
..
@@ -254,11 +322,11 @@
254
322
 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
255
323
 	 */
256
324
 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
325
+	.num_rbds = IWL_NUM_RBDS_NON_HE,
257
326
 };
258
327
 
259
-const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0_f0 = {
260
-	.name = "Intel(R) Dual Band Wireless AX 22000",
261
-	.fw_name_pre = IWL_22000_HR_A_F0_FW_PRE,
328
+const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = {
329
+	.fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE,
262
330
 	IWL_DEVICE_22500,
263
331
 	/*
264
332
 	 * This device doesn't support receiving BlockAck with a large bitmap
..
..
@@ -266,11 +334,49 @@
266
334
 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
267
335
 	 */
268
336
 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
337
+	.num_rbds = IWL_NUM_RBDS_NON_HE,
269
338
 };
270
339
 
271
-const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0 = {
272
-	.name = "Intel(R) Dual Band Wireless AX 22000",
273
-	.fw_name_pre = IWL_22000_HR_B_FW_PRE,
340
+const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = {
341
+	.device_family = IWL_DEVICE_FAMILY_22000,
342
+	.base_params = &iwl_22000_base_params,
343
+	.mq_rx_supported = true,
344
+	.use_tfh = true,
345
+	.rf_id = true,
346
+	.gen2 = true,
347
+	.bisr_workaround = 1,
348
+};
349
+
350
+const struct iwl_cfg_trans_params iwl_ma_trans_cfg = {
351
+	.device_family = IWL_DEVICE_FAMILY_AX210,
352
+	.base_params = &iwl_ax210_base_params,
353
+	.mq_rx_supported = true,
354
+	.use_tfh = true,
355
+	.rf_id = true,
356
+	.gen2 = true,
357
+	.integrated = true,
358
+	.umac_prph_offset = 0x300000
359
+};
360
+
361
+const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101";
362
+const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz";
363
+const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz";
364
+const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203";
365
+const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6 AX211 160MHz";
366
+const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6 AX411 160MHz";
367
+const char iwl_ma_name[] = "Intel(R) Wi-Fi 6";
368
+
369
+const char iwl_ax200_killer_1650w_name[] =
370
+	"Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)";
371
+const char iwl_ax200_killer_1650x_name[] =
372
+	"Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)";
373
+const char iwl_ax201_killer_1650s_name[] =
374
+	"Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)";
375
+const char iwl_ax201_killer_1650i_name[] =
376
+	"Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)";
377
+
378
+const struct iwl_cfg iwl_qu_b0_hr1_b0 = {
379
+	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
274
380
 	IWL_DEVICE_22500,
275
381
 	/*
276
382
 	 * This device doesn't support receiving BlockAck with a large bitmap
..
..
@@ -278,11 +384,12 @@
278
384
 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
279
385
 	 */
280
386
 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
387
+	.tx_with_siso_diversity = true,
388
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
281
389
 };
282
390
 
283
-const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0 = {
284
-	.name = "Intel(R) Dual Band Wireless AX 22000",
285
-	.fw_name_pre = IWL_22000_JF_B0_FW_PRE,
391
+const struct iwl_cfg iwl_qu_b0_hr_b0 = {
392
+	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
286
393
 	IWL_DEVICE_22500,
287
394
 	/*
288
395
 	 * This device doesn't support receiving BlockAck with a large bitmap
..
..
@@ -290,11 +397,12 @@
290
397
 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
291
398
 	 */
292
399
 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
400
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
293
401
 };
294
402
 
295
-const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0 = {
296
-	.name = "Intel(R) Dual Band Wireless AX 22000",
297
-	.fw_name_pre = IWL_22000_HR_A0_FW_PRE,
403
+const struct iwl_cfg iwl_ax201_cfg_qu_hr = {
404
+	.name = "Intel(R) Wi-Fi 6 AX201 160MHz",
405
+	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
298
406
 	IWL_DEVICE_22500,
299
407
 	/*
300
408
 	 * This device doesn't support receiving BlockAck with a large bitmap
..
..
@@ -302,27 +410,293 @@
302
410
 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
303
411
 	 */
304
412
 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
413
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
305
414
 };
306
415
 
307
-const struct iwl_cfg iwl22560_2ax_cfg_su_cdb = {
308
-	.name = "Intel(R) Dual Band Wireless AX 22560",
309
-	.fw_name_pre = IWL_22000_SU_Z0_FW_PRE,
310
-	IWL_DEVICE_22560,
311
-	.cdb = true,
416
+const struct iwl_cfg iwl_qu_c0_hr1_b0 = {
417
+	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
418
+	IWL_DEVICE_22500,
312
419
 	/*
313
420
 	 * This device doesn't support receiving BlockAck with a large bitmap
314
421
 	 * so we need to restrict the size of transmitted aggregation to the
315
422
 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
316
423
 	 */
317
424
 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
425
+	.tx_with_siso_diversity = true,
426
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
318
427
 };
319
428
 
320
-MODULE_FIRMWARE(IWL_22000_HR_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
321
-MODULE_FIRMWARE(IWL_22000_JF_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
322
-MODULE_FIRMWARE(IWL_22000_HR_A_F0_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
323
-MODULE_FIRMWARE(IWL_22000_HR_B_F0_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
324
-MODULE_FIRMWARE(IWL_22000_HR_B_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
325
-MODULE_FIRMWARE(IWL_22000_JF_B0_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
326
-MODULE_FIRMWARE(IWL_22000_HR_A0_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
327
-MODULE_FIRMWARE(IWL_22000_SU_Z0_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
429
+const struct iwl_cfg iwl_qu_c0_hr_b0 = {
430
+	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
431
+	IWL_DEVICE_22500,
432
+	/*
433
+	 * This device doesn't support receiving BlockAck with a large bitmap
434
+	 * so we need to restrict the size of transmitted aggregation to the
435
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
436
+	 */
437
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
438
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
439
+};
440
+
441
+const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = {
442
+	.name = "Intel(R) Wi-Fi 6 AX201 160MHz",
443
+	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
444
+	IWL_DEVICE_22500,
445
+	/*
446
+	 * This device doesn't support receiving BlockAck with a large bitmap
447
+	 * so we need to restrict the size of transmitted aggregation to the
448
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
449
+	 */
450
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
451
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
452
+};
453
+
454
+const struct iwl_cfg iwl_quz_a0_hr1_b0 = {
455
+	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
456
+	IWL_DEVICE_22500,
457
+	/*
458
+	 * This device doesn't support receiving BlockAck with a large bitmap
459
+	 * so we need to restrict the size of transmitted aggregation to the
460
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
461
+	 */
462
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
463
+	.tx_with_siso_diversity = true,
464
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
465
+};
466
+
467
+const struct iwl_cfg iwl_ax201_cfg_quz_hr = {
468
+	.name = "Intel(R) Wi-Fi 6 AX201 160MHz",
469
+	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
470
+	IWL_DEVICE_22500,
471
+	/*
472
+         * This device doesn't support receiving BlockAck with a large bitmap
473
+         * so we need to restrict the size of transmitted aggregation to the
474
+         * HT size; mac80211 would otherwise pick the HE max (256) by default.
475
+         */
476
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
477
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
478
+};
479
+
480
+const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = {
481
+	.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
482
+	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
483
+	IWL_DEVICE_22500,
484
+	/*
485
+         * This device doesn't support receiving BlockAck with a large bitmap
486
+         * so we need to restrict the size of transmitted aggregation to the
487
+         * HT size; mac80211 would otherwise pick the HE max (256) by default.
488
+         */
489
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
490
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
491
+};
492
+
493
+const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = {
494
+	.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
495
+	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
496
+	IWL_DEVICE_22500,
497
+	/*
498
+         * This device doesn't support receiving BlockAck with a large bitmap
499
+         * so we need to restrict the size of transmitted aggregation to the
500
+         * HT size; mac80211 would otherwise pick the HE max (256) by default.
501
+         */
502
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
503
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
504
+};
505
+
506
+const struct iwl_cfg iwl_ax200_cfg_cc = {
507
+	.fw_name_pre = IWL_CC_A_FW_PRE,
508
+	IWL_DEVICE_22500,
509
+	/*
510
+	 * This device doesn't support receiving BlockAck with a large bitmap
511
+	 * so we need to restrict the size of transmitted aggregation to the
512
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
513
+	 */
514
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
515
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
516
+};
517
+
518
+const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = {
519
+	.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
520
+	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
521
+	IWL_DEVICE_22500,
522
+	/*
523
+	 * This device doesn't support receiving BlockAck with a large bitmap
524
+	 * so we need to restrict the size of transmitted aggregation to the
525
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
526
+	 */
527
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
528
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
529
+};
530
+
531
+const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = {
532
+	.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
533
+	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
534
+	IWL_DEVICE_22500,
535
+	/*
536
+	 * This device doesn't support receiving BlockAck with a large bitmap
537
+	 * so we need to restrict the size of transmitted aggregation to the
538
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
539
+	 */
540
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
541
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
542
+};
543
+
544
+const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = {
545
+	.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
546
+	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
547
+	IWL_DEVICE_22500,
548
+	/*
549
+	 * This device doesn't support receiving BlockAck with a large bitmap
550
+	 * so we need to restrict the size of transmitted aggregation to the
551
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
552
+	 */
553
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
554
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
555
+};
556
+
557
+const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = {
558
+	.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
559
+	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
560
+	IWL_DEVICE_22500,
561
+	/*
562
+	 * This device doesn't support receiving BlockAck with a large bitmap
563
+	 * so we need to restrict the size of transmitted aggregation to the
564
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
565
+	 */
566
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
567
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
568
+};
569
+
570
+const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = {
571
+	.fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE,
572
+	IWL_DEVICE_22500,
573
+	/*
574
+	 * This device doesn't support receiving BlockAck with a large bitmap
575
+	 * so we need to restrict the size of transmitted aggregation to the
576
+	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
577
+	 */
578
+	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
579
+	.num_rbds = IWL_NUM_RBDS_22000_HE,
580
+};
581
+
582
+const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0 = {
583
+	.name = "Intel(R) Wireless-AC 9560 160MHz",
584
+	.fw_name_pre = IWL_SO_A_JF_B_FW_PRE,
585
+	IWL_DEVICE_AX210,
586
+	.num_rbds = IWL_NUM_RBDS_NON_HE,
587
+};
588
+
589
+const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = {
590
+	.name = "Intel(R) Wi-Fi 6 AX210 160MHz",
591
+	.fw_name_pre = IWL_SO_A_HR_B_FW_PRE,
592
+	IWL_DEVICE_AX210,
593
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
594
+};
595
+
596
+const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = {
597
+	.name = iwl_ax211_name,
598
+	.fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
599
+	.uhb_supported = true,
600
+	IWL_DEVICE_AX210,
601
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
602
+};
603
+
604
+const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = {
605
+	.name = iwl_ax211_name,
606
+	.fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
607
+	.uhb_supported = true,
608
+	IWL_DEVICE_AX210,
609
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
610
+	.trans.xtal_latency = 12000,
611
+	.trans.low_latency_xtal = true,
612
+};
613
+
614
+const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = {
615
+	.name = "Intel(R) Wi-Fi 6 AX210 160MHz",
616
+	.fw_name_pre = IWL_TY_A_GF_A_FW_PRE,
617
+	.uhb_supported = true,
618
+	IWL_DEVICE_AX210,
619
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
620
+};
621
+
622
+const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = {
623
+	.name = iwl_ax411_name,
624
+	.fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
625
+	.uhb_supported = true,
626
+	IWL_DEVICE_AX210,
627
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
628
+};
629
+
630
+const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = {
631
+	.name = iwl_ax411_name,
632
+	.fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
633
+	.uhb_supported = true,
634
+	IWL_DEVICE_AX210,
635
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
636
+	.trans.xtal_latency = 12000,
637
+	.trans.low_latency_xtal = true,
638
+};
639
+
640
+const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = {
641
+	.name = iwl_ax411_name,
642
+	.fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE,
643
+	.uhb_supported = true,
644
+	IWL_DEVICE_AX210,
645
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
646
+};
647
+
648
+const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = {
649
+	.name = iwl_ax211_name,
650
+	.fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE,
651
+	.uhb_supported = true,
652
+	IWL_DEVICE_AX210,
653
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
654
+};
655
+
656
+const struct iwl_cfg iwlax201_cfg_snj_hr_b0 = {
657
+	.name = iwl_ax201_name,
658
+	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
659
+	.uhb_supported = true,
660
+	IWL_DEVICE_AX210,
661
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
662
+};
663
+
664
+const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = {
665
+	.fw_name_pre = IWL_MA_A_GF_A_FW_PRE,
666
+	.uhb_supported = true,
667
+	IWL_DEVICE_AX210,
668
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
669
+};
670
+
671
+const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = {
672
+	.fw_name_pre = IWL_MA_A_MR_A_FW_PRE,
673
+	.uhb_supported = true,
674
+	IWL_DEVICE_AX210,
675
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
676
+};
677
+
678
+const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = {
679
+	.fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE,
680
+	.uhb_supported = true,
681
+	IWL_DEVICE_AX210,
682
+	.num_rbds = IWL_NUM_RBDS_AX210_HE,
683
+};
684
+
685
+MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
686
+MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
687
+MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
328
688
 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
689
+MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
690
+MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
691
+MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
692
+MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
693
+MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
694
+MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
695
+MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
696
+MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
697
+MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
698
+MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
699
+MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
700
+MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
701
+MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
702
+MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));