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| 1 | +// SPDX-License-Identifier: ISC |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (c) 2016-2017 Qualcomm Atheros, Inc. All rights reserved. |
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| 3 | 4 | * Copyright (c) 2015 The Linux Foundation. All rights reserved. |
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| 4 | | - * |
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| 5 | | - * Permission to use, copy, modify, and/or distribute this software for any |
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| 6 | | - * purpose with or without fee is hereby granted, provided that the above |
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| 7 | | - * copyright notice and this permission notice appear in all copies. |
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| 8 | | - * |
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| 9 | | - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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| 10 | | - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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| 11 | | - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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| 12 | | - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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| 13 | | - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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| 14 | | - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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| 15 | | - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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| 16 | 5 | */ |
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| 17 | 6 | #include <linux/module.h> |
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| 18 | 7 | #include <linux/of.h> |
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| .. | .. |
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| 469 | 458 | |
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| 470 | 459 | ar_ahb->mem_len = resource_size(res); |
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| 471 | 460 | |
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| 472 | | - ar_ahb->gcc_mem = ioremap_nocache(ATH10K_GCC_REG_BASE, |
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| 473 | | - ATH10K_GCC_REG_SIZE); |
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| 461 | + ar_ahb->gcc_mem = ioremap(ATH10K_GCC_REG_BASE, |
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| 462 | + ATH10K_GCC_REG_SIZE); |
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| 474 | 463 | if (!ar_ahb->gcc_mem) { |
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| 475 | 464 | ath10k_err(ar, "gcc mem ioremap error\n"); |
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| 476 | 465 | ret = -ENOMEM; |
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| 477 | 466 | goto err_mem_unmap; |
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| 478 | 467 | } |
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| 479 | 468 | |
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| 480 | | - ar_ahb->tcsr_mem = ioremap_nocache(ATH10K_TCSR_REG_BASE, |
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| 481 | | - ATH10K_TCSR_REG_SIZE); |
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| 469 | + ar_ahb->tcsr_mem = ioremap(ATH10K_TCSR_REG_BASE, |
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| 470 | + ATH10K_TCSR_REG_SIZE); |
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| 482 | 471 | if (!ar_ahb->tcsr_mem) { |
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| 483 | 472 | ath10k_err(ar, "tcsr mem ioremap error\n"); |
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| 484 | 473 | ret = -ENOMEM; |
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| .. | .. |
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| 661 | 650 | ath10k_pci_flush(ar); |
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| 662 | 651 | } |
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| 663 | 652 | |
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| 664 | | -static int ath10k_ahb_hif_power_up(struct ath10k *ar) |
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| 653 | +static int ath10k_ahb_hif_power_up(struct ath10k *ar, |
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| 654 | + enum ath10k_firmware_mode fw_mode) |
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| 665 | 655 | { |
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| 666 | 656 | int ret; |
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| 667 | 657 | |
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| .. | .. |
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| 750 | 740 | enum ath10k_hw_rev hw_rev; |
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| 751 | 741 | size_t size; |
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| 752 | 742 | int ret; |
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| 753 | | - u32 chip_id; |
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| 743 | + struct ath10k_bus_params bus_params = {}; |
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| 754 | 744 | |
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| 755 | 745 | of_id = of_match_device(ath10k_ahb_of_match, &pdev->dev); |
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| 756 | 746 | if (!of_id) { |
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| .. | .. |
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| 806 | 796 | |
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| 807 | 797 | ath10k_pci_ce_deinit(ar); |
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| 808 | 798 | |
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| 809 | | - chip_id = ath10k_ahb_soc_read32(ar, SOC_CHIP_ID_ADDRESS); |
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| 810 | | - if (chip_id == 0xffffffff) { |
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| 799 | + bus_params.dev_type = ATH10K_DEV_TYPE_LL; |
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| 800 | + bus_params.chip_id = ath10k_ahb_soc_read32(ar, SOC_CHIP_ID_ADDRESS); |
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| 801 | + if (bus_params.chip_id == 0xffffffff) { |
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| 811 | 802 | ath10k_err(ar, "failed to get chip id\n"); |
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| 812 | 803 | ret = -ENODEV; |
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| 813 | 804 | goto err_halt_device; |
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| 814 | 805 | } |
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| 815 | 806 | |
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| 816 | | - ret = ath10k_core_register(ar, chip_id); |
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| 807 | + ret = ath10k_core_register(ar, &bus_params); |
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| 817 | 808 | if (ret) { |
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| 818 | 809 | ath10k_err(ar, "failed to register driver core: %d\n", ret); |
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| 819 | 810 | goto err_halt_device; |
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| .. | .. |
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| 829 | 820 | ath10k_ahb_release_irq_legacy(ar); |
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| 830 | 821 | |
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| 831 | 822 | err_free_pipes: |
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| 832 | | - ath10k_pci_free_pipes(ar); |
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| 823 | + ath10k_pci_release_resource(ar); |
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| 833 | 824 | |
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| 834 | 825 | err_resource_deinit: |
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| 835 | 826 | ath10k_ahb_resource_deinit(ar); |
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