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2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5 
 kernel/drivers/net/dsa/mv88e6xxx/global1.c
....@@ -75,37 +75,6 @@
7575 	return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_STS, bit, 1);
7676 }
7777 
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-void mv88e6xxx_g1_wait_eeprom_done(struct mv88e6xxx_chip *chip)
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-{
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-	const unsigned long timeout = jiffies + 1 * HZ;
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-	u16 val;
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-	int err;
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-
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-	/* Wait up to 1 second for the switch to finish reading the
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-	 * EEPROM.
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-	 */
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-	while (time_before(jiffies, timeout)) {
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-		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STS, &val);
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-		if (err) {
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-			dev_err(chip->dev, "Error reading status");
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-			return;
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-		}
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-
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-		/* If the switch is still resetting, it may not
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-		 * respond on the bus, and so MDIO read returns
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-		 * 0xffff. Differentiate between that, and waiting for
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-		 * the EEPROM to be done by bit 0 being set.
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-		 */
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-		if (val != 0xffff &&
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-		    val & BIT(MV88E6XXX_G1_STS_IRQ_EEPROM_DONE))
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-			return;
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-
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-		usleep_range(1000, 2000);
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-	}
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-
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-	dev_err(chip->dev, "Timeout waiting for EEPROM done");
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-}
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-
10978 /* Offset 0x01: Switch MAC Address Register Bytes 0 & 1
11079  * Offset 0x02: Switch MAC Address Register Bytes 2 & 3
11180  * Offset 0x03: Switch MAC Address Register Bytes 4 & 5