hc
2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5
kernel/drivers/mtd/nand/raw/oxnas_nand.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Oxford Semiconductor OXNAS NAND driver
34
....@@ -6,11 +7,6 @@
67 * Author: Vitaly Wool <vitalywool@gmail.com>
78 * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
89 * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
9
- *
10
- * This program is free software; you can redistribute it and/or modify
11
- * it under the terms of the GNU General Public License version 2 as
12
- * published by the Free Software Foundation.
13
- *
1410 */
1511
1612 #include <linux/err.h>
....@@ -39,35 +35,32 @@
3935 unsigned int nchips;
4036 };
4137
42
-static uint8_t oxnas_nand_read_byte(struct mtd_info *mtd)
38
+static uint8_t oxnas_nand_read_byte(struct nand_chip *chip)
4339 {
44
- struct nand_chip *chip = mtd_to_nand(mtd);
4540 struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
4641
4742 return readb(oxnas->io_base);
4843 }
4944
50
-static void oxnas_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
45
+static void oxnas_nand_read_buf(struct nand_chip *chip, u8 *buf, int len)
5146 {
52
- struct nand_chip *chip = mtd_to_nand(mtd);
5347 struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
5448
5549 ioread8_rep(oxnas->io_base, buf, len);
5650 }
5751
58
-static void oxnas_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
52
+static void oxnas_nand_write_buf(struct nand_chip *chip, const u8 *buf,
53
+ int len)
5954 {
60
- struct nand_chip *chip = mtd_to_nand(mtd);
6155 struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
6256
6357 iowrite8_rep(oxnas->io_base, buf, len);
6458 }
6559
6660 /* Single CS command control */
67
-static void oxnas_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
61
+static void oxnas_nand_cmd_ctrl(struct nand_chip *chip, int cmd,
6862 unsigned int ctrl)
6963 {
70
- struct nand_chip *chip = mtd_to_nand(mtd);
7164 struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip);
7265
7366 if (ctrl & NAND_CLE)
....@@ -136,11 +129,11 @@
136129 mtd->dev.parent = &pdev->dev;
137130 mtd->priv = chip;
138131
139
- chip->cmd_ctrl = oxnas_nand_cmd_ctrl;
140
- chip->read_buf = oxnas_nand_read_buf;
141
- chip->read_byte = oxnas_nand_read_byte;
142
- chip->write_buf = oxnas_nand_write_buf;
143
- chip->chip_delay = 30;
132
+ chip->legacy.cmd_ctrl = oxnas_nand_cmd_ctrl;
133
+ chip->legacy.read_buf = oxnas_nand_read_buf;
134
+ chip->legacy.read_byte = oxnas_nand_read_byte;
135
+ chip->legacy.write_buf = oxnas_nand_write_buf;
136
+ chip->legacy.chip_delay = 30;
144137
145138 /* Scan to find existence of the device */
146139 err = nand_scan(chip, 1);
....@@ -151,8 +144,7 @@
151144 if (err)
152145 goto err_cleanup_nand;
153146
154
- oxnas->chips[oxnas->nchips] = chip;
155
- ++oxnas->nchips;
147
+ oxnas->chips[oxnas->nchips++] = chip;
156148 }
157149
158150 /* Exit if no chips found */
....@@ -189,7 +181,8 @@
189181
190182 for (i = 0; i < oxnas->nchips; i++) {
191183 chip = oxnas->chips[i];
192
- nand_release(chip);
184
+ WARN_ON(mtd_device_unregister(nand_to_mtd(chip)));
185
+ nand_cleanup(chip);
193186 }
194187
195188 clk_disable_unprepare(oxnas->clk);