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2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5 
 kernel/drivers/memory/tegra/tegra124-emc.c
....@@ -1,18 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
34  *
45  * Author:
56  *	Mikko Perttunen <mperttunen@nvidia.com>
6
- *
7
- * This software is licensed under the terms of the GNU General Public
8
- * License version 2, as published by the Free Software Foundation, and
9
- * may be copied, distributed, and modified under those terms.
10
- *
11
- * This program is distributed in the hope that it will be useful,
12
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
- * GNU General Public License for more details.
15
- *
167  */
178 
189 #include <linux/clk-provider.h>
....@@ -20,6 +11,7 @@
2011 #include <linux/clkdev.h>
2112 #include <linux/debugfs.h>
2213 #include <linux/delay.h>
14
+#include <linux/io.h>
2315 #include <linux/of_address.h>
2416 #include <linux/of_platform.h>
2517 #include <linux/platform_device.h>
....@@ -273,8 +265,8 @@
273265 #define EMC_PUTERM_ADJ				0x574
274266 
275267 #define DRAM_DEV_SEL_ALL			0
276
-#define DRAM_DEV_SEL_0				(2 << 30)
277
-#define DRAM_DEV_SEL_1				(1 << 30)
268
+#define DRAM_DEV_SEL_0				BIT(31)
269
+#define DRAM_DEV_SEL_1				BIT(30)
278270 
279271 #define EMC_CFG_POWER_FEATURES_MASK		\
280272 	(EMC_CFG_DYN_SREF | EMC_CFG_DRAM_ACPD | EMC_CFG_DRAM_CLKSTOP_SR | \
....@@ -475,12 +467,20 @@
475467 
476468 	void __iomem *regs;
477469 
470
+	struct clk *clk;
471
+
478472 	enum emc_dram_type dram_type;
479473 	unsigned int dram_num;
480474 
481475 	struct emc_timing last_timing;
482476 	struct emc_timing *timings;
483477 	unsigned int num_timings;
478
+
479
+	struct {
480
+		struct dentry *root;
481
+		unsigned long min_rate;
482
+		unsigned long max_rate;
483
+	} debugfs;
484484 };
485485 
486486 /* Timing change sequence functions */
....@@ -888,8 +888,8 @@
888888 
889889 	err = of_property_read_u32(node, "clock-frequency", &value);
890890 	if (err) {
891
-		dev_err(emc->dev, "timing %s: failed to read rate: %d\n",
892
-			node->name, err);
891
+		dev_err(emc->dev, "timing %pOFn: failed to read rate: %d\n",
892
+			node, err);
893893 		return err;
894894 	}
895895 
....@@ -900,16 +900,16 @@
900900 					 ARRAY_SIZE(timing->emc_burst_data));
901901 	if (err) {
902902 		dev_err(emc->dev,
903
-			"timing %s: failed to read emc burst data: %d\n",
904
-			node->name, err);
903
+			"timing %pOFn: failed to read emc burst data: %d\n",
904
+			node, err);
905905 		return err;
906906 	}
907907 
908908 #define EMC_READ_PROP(prop, dtprop) { \
909909 	err = of_property_read_u32(node, dtprop, &timing->prop); \
910910 	if (err) { \
911
-		dev_err(emc->dev, "timing %s: failed to read " #prop ": %d\n", \
912
-			node->name, err); \
911
+		dev_err(emc->dev, "timing %pOFn: failed to read " #prop ": %d\n", \
912
+			node, err); \
913913 		return err; \
914914 	} \
915915 }
....@@ -984,6 +984,7 @@
984984 
985985 static const struct of_device_id tegra_emc_of_match[] = {
986986 	{ .compatible = "nvidia,tegra124-emc" },
987
+	{ .compatible = "nvidia,tegra132-emc" },
987988 	{}
988989 };
989990 
....@@ -1006,38 +1007,51 @@
10061007 	return NULL;
10071008 }
10081009 
1009
-/* Debugfs entry */
1010
+/*
1011
+ * debugfs interface
1012
+ *
1013
+ * The memory controller driver exposes some files in debugfs that can be used
1014
+ * to control the EMC frequency. The top-level directory can be found here:
1015
+ *
1016
+ *   /sys/kernel/debug/emc
1017
+ *
1018
+ * It contains the following files:
1019
+ *
1020
+ *   - available_rates: This file contains a list of valid, space-separated
1021
+ *     EMC frequencies.
1022
+ *
1023
+ *   - min_rate: Writing a value to this file sets the given frequency as the
1024
+ *       floor of the permitted range. If this is higher than the currently
1025
+ *       configured EMC frequency, this will cause the frequency to be
1026
+ *       increased so that it stays within the valid range.
1027
+ *
1028
+ *   - max_rate: Similarily to the min_rate file, writing a value to this file
1029
+ *       sets the given frequency as the ceiling of the permitted range. If
1030
+ *       the value is lower than the currently configured EMC frequency, this
1031
+ *       will cause the frequency to be decreased so that it stays within the
1032
+ *       valid range.
1033
+ */
10101034 
1011
-static int emc_debug_rate_get(void *data, u64 *rate)
1035
+static bool tegra_emc_validate_rate(struct tegra_emc *emc, unsigned long rate)
10121036 {
1013
-	struct clk *c = data;
1037
+	unsigned int i;
10141038 
1015
-	*rate = clk_get_rate(c);
1039
+	for (i = 0; i < emc->num_timings; i++)
1040
+		if (rate == emc->timings[i].rate)
1041
+			return true;
10161042 
1017
-	return 0;
1043
+	return false;
10181044 }
10191045 
1020
-static int emc_debug_rate_set(void *data, u64 rate)
1021
-{
1022
-	struct clk *c = data;
1023
-
1024
-	return clk_set_rate(c, rate);
1025
-}
1026
-
1027
-DEFINE_SIMPLE_ATTRIBUTE(emc_debug_rate_fops, emc_debug_rate_get,
1028
-			emc_debug_rate_set, "%lld\n");
1029
-
1030
-static int emc_debug_supported_rates_show(struct seq_file *s, void *data)
1046
+static int tegra_emc_debug_available_rates_show(struct seq_file *s,
1047
+						void *data)
10311048 {
10321049 	struct tegra_emc *emc = s->private;
10331050 	const char *prefix = "";
10341051 	unsigned int i;
10351052 
10361053 	for (i = 0; i < emc->num_timings; i++) {
1037
-		struct emc_timing *timing = &emc->timings[i];
1038
-
1039
-		seq_printf(s, "%s%lu", prefix, timing->rate);
1040
-
1054
+		seq_printf(s, "%s%lu", prefix, emc->timings[i].rate);
10411055 		prefix = " ";
10421056 	}
10431057 
....@@ -1046,46 +1060,119 @@
10461060 	return 0;
10471061 }
10481062 
1049
-static int emc_debug_supported_rates_open(struct inode *inode,
1050
-					  struct file *file)
1063
+DEFINE_SHOW_ATTRIBUTE(tegra_emc_debug_available_rates);
1064
+
1065
+static int tegra_emc_debug_min_rate_get(void *data, u64 *rate)
10511066 {
1052
-	return single_open(file, emc_debug_supported_rates_show,
1053
-			   inode->i_private);
1067
+	struct tegra_emc *emc = data;
1068
+
1069
+	*rate = emc->debugfs.min_rate;
1070
+
1071
+	return 0;
10541072 }
10551073 
1056
-static const struct file_operations emc_debug_supported_rates_fops = {
1057
-	.open = emc_debug_supported_rates_open,
1058
-	.read = seq_read,
1059
-	.llseek = seq_lseek,
1060
-	.release = single_release,
1061
-};
1074
+static int tegra_emc_debug_min_rate_set(void *data, u64 rate)
1075
+{
1076
+	struct tegra_emc *emc = data;
1077
+	int err;
1078
+
1079
+	if (!tegra_emc_validate_rate(emc, rate))
1080
+		return -EINVAL;
1081
+
1082
+	err = clk_set_min_rate(emc->clk, rate);
1083
+	if (err < 0)
1084
+		return err;
1085
+
1086
+	emc->debugfs.min_rate = rate;
1087
+
1088
+	return 0;
1089
+}
1090
+
1091
+DEFINE_SIMPLE_ATTRIBUTE(tegra_emc_debug_min_rate_fops,
1092
+			tegra_emc_debug_min_rate_get,
1093
+			tegra_emc_debug_min_rate_set, "%llu\n");
1094
+
1095
+static int tegra_emc_debug_max_rate_get(void *data, u64 *rate)
1096
+{
1097
+	struct tegra_emc *emc = data;
1098
+
1099
+	*rate = emc->debugfs.max_rate;
1100
+
1101
+	return 0;
1102
+}
1103
+
1104
+static int tegra_emc_debug_max_rate_set(void *data, u64 rate)
1105
+{
1106
+	struct tegra_emc *emc = data;
1107
+	int err;
1108
+
1109
+	if (!tegra_emc_validate_rate(emc, rate))
1110
+		return -EINVAL;
1111
+
1112
+	err = clk_set_max_rate(emc->clk, rate);
1113
+	if (err < 0)
1114
+		return err;
1115
+
1116
+	emc->debugfs.max_rate = rate;
1117
+
1118
+	return 0;
1119
+}
1120
+
1121
+DEFINE_SIMPLE_ATTRIBUTE(tegra_emc_debug_max_rate_fops,
1122
+			tegra_emc_debug_max_rate_get,
1123
+			tegra_emc_debug_max_rate_set, "%llu\n");
10621124 
10631125 static void emc_debugfs_init(struct device *dev, struct tegra_emc *emc)
10641126 {
1065
-	struct dentry *root, *file;
1066
-	struct clk *clk;
1127
+	unsigned int i;
1128
+	int err;
10671129 
1068
-	root = debugfs_create_dir("emc", NULL);
1069
-	if (!root) {
1130
+	emc->clk = devm_clk_get(dev, "emc");
1131
+	if (IS_ERR(emc->clk)) {
1132
+		if (PTR_ERR(emc->clk) != -ENODEV) {
1133
+			dev_err(dev, "failed to get EMC clock: %ld\n",
1134
+				PTR_ERR(emc->clk));
1135
+			return;
1136
+		}
1137
+	}
1138
+
1139
+	emc->debugfs.min_rate = ULONG_MAX;
1140
+	emc->debugfs.max_rate = 0;
1141
+
1142
+	for (i = 0; i < emc->num_timings; i++) {
1143
+		if (emc->timings[i].rate < emc->debugfs.min_rate)
1144
+			emc->debugfs.min_rate = emc->timings[i].rate;
1145
+
1146
+		if (emc->timings[i].rate > emc->debugfs.max_rate)
1147
+			emc->debugfs.max_rate = emc->timings[i].rate;
1148
+	}
1149
+
1150
+	if (!emc->num_timings) {
1151
+		emc->debugfs.min_rate = clk_get_rate(emc->clk);
1152
+		emc->debugfs.max_rate = emc->debugfs.min_rate;
1153
+	}
1154
+
1155
+	err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,
1156
+				 emc->debugfs.max_rate);
1157
+	if (err < 0) {
1158
+		dev_err(dev, "failed to set rate range [%lu-%lu] for %pC\n",
1159
+			emc->debugfs.min_rate, emc->debugfs.max_rate,
1160
+			emc->clk);
1161
+		return;
1162
+	}
1163
+
1164
+	emc->debugfs.root = debugfs_create_dir("emc", NULL);
1165
+	if (!emc->debugfs.root) {
10701166 		dev_err(dev, "failed to create debugfs directory\n");
10711167 		return;
10721168 	}
10731169 
1074
-	clk = clk_get_sys("tegra-clk-debug", "emc");
1075
-	if (IS_ERR(clk)) {
1076
-		dev_err(dev, "failed to get debug clock: %ld\n", PTR_ERR(clk));
1077
-		return;
1078
-	}
1079
-
1080
-	file = debugfs_create_file("rate", S_IRUGO | S_IWUSR, root, clk,
1081
-				   &emc_debug_rate_fops);
1082
-	if (!file)
1083
-		dev_err(dev, "failed to create debugfs entry\n");
1084
-
1085
-	file = debugfs_create_file("supported_rates", S_IRUGO, root, emc,
1086
-				   &emc_debug_supported_rates_fops);
1087
-	if (!file)
1088
-		dev_err(dev, "failed to create debugfs entry\n");
1170
+	debugfs_create_file("available_rates", 0444, emc->debugfs.root, emc,
1171
+			    &tegra_emc_debug_available_rates_fops);
1172
+	debugfs_create_file("min_rate", 0644, emc->debugfs.root,
1173
+			    emc, &tegra_emc_debug_min_rate_fops);
1174
+	debugfs_create_file("max_rate", 0644, emc->debugfs.root,
1175
+			    emc, &tegra_emc_debug_max_rate_fops);
10891176 }
10901177 
10911178 static int tegra_emc_probe(struct platform_device *pdev)