修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/drivers/memory/tegra/mc.h
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..
@@ -1,47 +1,95 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Copyright (C) 2014 NVIDIA CORPORATION.  All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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 #ifndef MEMORY_TEGRA_MC_H
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 #define MEMORY_TEGRA_MC_H
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+#include <linux/bits.h>
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 #include <linux/io.h>
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 #include <linux/types.h>
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 #include <soc/tegra/mc.h>
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14
 
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-#define MC_INT_DECERR_MTS (1 << 16)
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-#define MC_INT_SECERR_SEC (1 << 13)
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-#define MC_INT_DECERR_VPR (1 << 12)
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-#define MC_INT_INVALID_APB_ASID_UPDATE (1 << 11)
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-#define MC_INT_INVALID_SMMU_PAGE (1 << 10)
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-#define MC_INT_ARBITRATION_EMEM (1 << 9)
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-#define MC_INT_SECURITY_VIOLATION (1 << 8)
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-#define MC_INT_INVALID_GART_PAGE (1 << 7)
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-#define MC_INT_DECERR_EMEM (1 << 6)
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+#define MC_INTSTATUS					0x00
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+#define MC_INTMASK					0x04
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+#define MC_ERR_STATUS					0x08
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+#define MC_ERR_ADR					0x0c
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+#define MC_GART_ERROR_REQ				0x30
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+#define MC_EMEM_ADR_CFG					0x54
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+#define MC_DECERR_EMEM_OTHERS_STATUS			0x58
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+#define MC_SECURITY_VIOLATION_STATUS			0x74
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+#define MC_EMEM_ARB_CFG					0x90
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+#define MC_EMEM_ARB_OUTSTANDING_REQ			0x94
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+#define MC_EMEM_ARB_TIMING_RCD				0x98
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+#define MC_EMEM_ARB_TIMING_RP				0x9c
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+#define MC_EMEM_ARB_TIMING_RC				0xa0
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+#define MC_EMEM_ARB_TIMING_RAS				0xa4
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+#define MC_EMEM_ARB_TIMING_FAW				0xa8
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+#define MC_EMEM_ARB_TIMING_RRD				0xac
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+#define MC_EMEM_ARB_TIMING_RAP2PRE			0xb0
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+#define MC_EMEM_ARB_TIMING_WAP2PRE			0xb4
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+#define MC_EMEM_ARB_TIMING_R2R				0xb8
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+#define MC_EMEM_ARB_TIMING_W2W				0xbc
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+#define MC_EMEM_ARB_TIMING_R2W				0xc0
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+#define MC_EMEM_ARB_TIMING_W2R				0xc4
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+#define MC_EMEM_ARB_MISC2				0xc8
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+#define MC_EMEM_ARB_DA_TURNS				0xd0
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+#define MC_EMEM_ARB_DA_COVERS				0xd4
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+#define MC_EMEM_ARB_MISC0				0xd8
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+#define MC_EMEM_ARB_MISC1				0xdc
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+#define MC_EMEM_ARB_RING1_THROTTLE			0xe0
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+#define MC_EMEM_ARB_OVERRIDE				0xe8
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+#define MC_TIMING_CONTROL_DBG				0xf8
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+#define MC_TIMING_CONTROL				0xfc
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+
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+#define MC_INT_DECERR_MTS				BIT(16)
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+#define MC_INT_SECERR_SEC				BIT(13)
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+#define MC_INT_DECERR_VPR				BIT(12)
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+#define MC_INT_INVALID_APB_ASID_UPDATE			BIT(11)
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+#define MC_INT_INVALID_SMMU_PAGE			BIT(10)
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+#define MC_INT_ARBITRATION_EMEM				BIT(9)
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+#define MC_INT_SECURITY_VIOLATION			BIT(8)
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+#define MC_INT_INVALID_GART_PAGE			BIT(7)
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+#define MC_INT_DECERR_EMEM				BIT(6)
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+
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+#define MC_ERR_STATUS_TYPE_SHIFT			28
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+#define MC_ERR_STATUS_TYPE_INVALID_SMMU_PAGE		(0x6 << 28)
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+#define MC_ERR_STATUS_TYPE_MASK				(0x7 << 28)
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+#define MC_ERR_STATUS_READABLE				BIT(27)
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+#define MC_ERR_STATUS_WRITABLE				BIT(26)
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+#define MC_ERR_STATUS_NONSECURE				BIT(25)
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+#define MC_ERR_STATUS_ADR_HI_SHIFT			20
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+#define MC_ERR_STATUS_ADR_HI_MASK			0x3
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+#define MC_ERR_STATUS_SECURITY				BIT(17)
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+#define MC_ERR_STATUS_RW				BIT(16)
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+
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+#define MC_EMEM_ADR_CFG_EMEM_NUMDEV			BIT(0)
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+
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+#define MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE(x)		((x) & 0x1ff)
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+#define MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE_MASK		0x1ff
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+
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+#define MC_EMEM_ARB_OUTSTANDING_REQ_MAX_MASK		0x1ff
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+#define MC_EMEM_ARB_OUTSTANDING_REQ_HOLDOFF_OVERRIDE	BIT(30)
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+#define MC_EMEM_ARB_OUTSTANDING_REQ_LIMIT_ENABLE	BIT(31)
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+
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+#define MC_EMEM_ARB_OVERRIDE_EACK_MASK			0x3
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+
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+#define MC_TIMING_UPDATE				BIT(0)
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 static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset)
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 {
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-	if (mc->regs2 && offset >= 0x24)
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-		return readl(mc->regs2 + offset - 0x3c);
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-
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-	return readl(mc->regs + offset);
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+	return readl_relaxed(mc->regs + offset);
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 }
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 static inline void mc_writel(struct tegra_mc *mc, u32 value,
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 			     unsigned long offset)
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 {
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-	if (mc->regs2 && offset >= 0x24)
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-		return writel(value, mc->regs2 + offset - 0x3c);
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-
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-	writel(value, mc->regs + offset);
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+	writel_relaxed(value, mc->regs + offset);
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 }
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-extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common;
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+extern const struct tegra_mc_reset_ops tegra_mc_reset_ops_common;
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 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
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 extern const struct tegra_mc_soc tegra20_mc_soc;