~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,19 +1,8 @@
	1	+/* SPDX-License-Identifier: GPL-2.0-only */
1	2	/*
2	3	* Tegra host1x Register Offsets for Tegra186
3	4	*
4	5	* Copyright (c) 2017 NVIDIA Corporation.
5		- *
6		- * This program is free software; you can redistribute it and/or modify it
7		- * under the terms and conditions of the GNU General Public License,
8		- * version 2, as published by the Free Software Foundation.
9		- *
10		- * This program is distributed in the hope it will be useful, but WITHOUT
11		- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12		- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13		- * more details.
14		- *
15		- * You should have received a copy of the GNU General Public License
16		- * along with this program. If not, see <http://www.gnu.org/licenses/>.
17	6	*/
18	7
19	8	#ifndef __HOST1X_HOST1X06_HARDWARE_H
..	..	@@ -22,6 +11,7 @@
22	11	#include <linux/types.h>
23	12	#include <linux/bitops.h>
24	13
	14	+#include "hw_host1x06_channel.h"
25	15	#include "hw_host1x06_uclass.h"
26	16	#include "hw_host1x06_vm.h"
27	17	#include "hw_host1x06_hypervisor.h"
..	..	@@ -137,6 +127,11 @@
137	127	return (6 << 28) \| (offset << 16) \| BIT(15) \| BIT(14) \| count;
138	128	}
139	129
	130	+static inline u32 host1x_opcode_gather_wide(unsigned count)
	131	+{
	132	+ return (12 << 28) \| count;
	133	+}
	134	+
140	135	#define HOST1X_OPCODE_NOP host1x_opcode_nonincr(0, 0)
141	136
142	137	#endif