forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5
kernel/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
....@@ -28,6 +28,8 @@
2828
2929 #include "mem_input.h"
3030
31
+#define OPP_ID_INVALID 0xf
32
+
3133
3234 enum cursor_pitch {
3335 CURSOR_PITCH_64_PIXELS = 0,
....@@ -36,10 +38,20 @@
3638 };
3739
3840 enum cursor_lines_per_chunk {
41
+ CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
3942 CURSOR_LINE_PER_CHUNK_2 = 1,
4043 CURSOR_LINE_PER_CHUNK_4,
4144 CURSOR_LINE_PER_CHUNK_8,
4245 CURSOR_LINE_PER_CHUNK_16
46
+};
47
+
48
+enum hubp_ind_block_size {
49
+ hubp_ind_block_unconstrained = 0,
50
+ hubp_ind_block_64b,
51
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
52
+ hubp_ind_block_128b,
53
+ hubp_ind_block_64b_no_128bcl,
54
+#endif
4355 };
4456
4557 struct hubp {
....@@ -55,6 +67,26 @@
5567 bool power_gated;
5668 };
5769
70
+struct surface_flip_registers {
71
+ uint32_t DCSURF_SURFACE_CONTROL;
72
+ uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
73
+ uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
74
+ uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
75
+ uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
76
+ uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
77
+ uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
78
+ uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
79
+ uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
80
+ uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
81
+ uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
82
+ uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
83
+ uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
84
+ bool tmz_surface;
85
+ bool immediate;
86
+ uint8_t vmid;
87
+ bool grph_stereo;
88
+};
89
+
5890 struct hubp_funcs {
5991 void (*hubp_setup)(
6092 struct hubp *hubp,
....@@ -63,8 +95,14 @@
6395 struct _vcs_dpi_display_rq_regs_st *rq_regs,
6496 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
6597
98
+ void (*hubp_setup_interdependent)(
99
+ struct hubp *hubp,
100
+ struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
101
+ struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
102
+
66103 void (*dcc_control)(struct hubp *hubp, bool enable,
67
- bool independent_64b_blks);
104
+ enum hubp_ind_block_size blk_size);
105
+
68106 void (*mem_program_viewport)(
69107 struct hubp *hubp,
70108 const struct rect *viewport,
....@@ -93,15 +131,13 @@
93131 struct hubp *hubp,
94132 enum surface_pixel_format format,
95133 union dc_tiling_info *tiling_info,
96
- union plane_size *plane_size,
134
+ struct plane_size *plane_size,
97135 enum dc_rotation_angle rotation,
98136 struct dc_plane_dcc_param *dcc,
99
- bool horizontal_mirror);
137
+ bool horizontal_mirror,
138
+ unsigned int compa_level);
100139
101140 bool (*hubp_is_flip_pending)(struct hubp *hubp);
102
-
103
- void (*hubp_update_dchub)(struct hubp *hubp,
104
- struct dchub_init_data *dh_data);
105141
106142 void (*set_blank)(struct hubp *hubp, bool blank);
107143 void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
....@@ -120,8 +156,37 @@
120156 void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
121157 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
122158 void (*hubp_read_state)(struct hubp *hubp);
159
+ void (*hubp_clear_underflow)(struct hubp *hubp);
123160 void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
124161 unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
162
+ void (*hubp_init)(struct hubp *hubp);
163
+
164
+ void (*dmdata_set_attributes)(
165
+ struct hubp *hubp,
166
+ const struct dc_dmdata_attributes *attr);
167
+
168
+ void (*dmdata_load)(
169
+ struct hubp *hubp,
170
+ uint32_t dmdata_sw_size,
171
+ const uint32_t *dmdata_sw_data);
172
+ bool (*dmdata_status_done)(struct hubp *hubp);
173
+ void (*hubp_enable_tripleBuffer)(
174
+ struct hubp *hubp,
175
+ bool enable);
176
+
177
+ bool (*hubp_is_triplebuffer_enabled)(
178
+ struct hubp *hubp);
179
+
180
+ void (*hubp_set_flip_control_surface_gsl)(
181
+ struct hubp *hubp,
182
+ bool enable);
183
+
184
+ void (*validate_dml_output)(
185
+ struct hubp *hubp,
186
+ struct dc_context *ctx,
187
+ struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
188
+ struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
189
+ struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
125190
126191 };
127192