forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5 
 kernel/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
....@@ -23,6 +23,8 @@
2323  *
2424  */
2525 
26
+#include <linux/slab.h>
27
+
2628 #include "dm_services.h"
2729 #include "dcn10_opp.h"
2830 #include "reg_helper.h"
....@@ -166,7 +168,10 @@
166168 		REG_UPDATE(FMT_CONTROL, FMT_PIXEL_ENCODING, 0);
167169 		break;
168170 	case PIXEL_ENCODING_YCBCR422:
169
-		REG_UPDATE(FMT_CONTROL, FMT_PIXEL_ENCODING, 1);
171
+		REG_UPDATE_3(FMT_CONTROL,
172
+				FMT_PIXEL_ENCODING, 1,
173
+				FMT_SUBSAMPLING_MODE, 2,
174
+				FMT_CBCR_BIT_REDUCTION_BYPASS, 0);
170175 		break;
171176 	case PIXEL_ENCODING_YCBCR420:
172177 		REG_UPDATE(FMT_CONTROL, FMT_PIXEL_ENCODING, 2);
....@@ -234,6 +239,9 @@
234239 	REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
235240 			FMT_DYNAMIC_EXP_EN, 0,
236241 			FMT_DYNAMIC_EXP_MODE, 0);
242
+
243
+	if (opp->dyn_expansion == DYN_EXPANSION_DISABLE)
244
+		return;
237245 
238246 	/*00 - 10-bit -> 12-bit dynamic expansion*/
239247 	/*01 - 8-bit  -> 12-bit dynamic expansion*/
....@@ -365,6 +373,9 @@
365373 	 */
366374 	REG_UPDATE(OPPBUF_CONTROL, OPPBUF_PIXEL_REPETITION, oppbuf->pixel_repetition);
367375 
376
+	/* Controls the number of padded pixels at the end of a segment */
377
+	if (REG(OPPBUF_CONTROL1))
378
+		REG_UPDATE(OPPBUF_CONTROL1, OPPBUF_NUM_SEGMENT_PADDED_PIXELS, oppbuf->num_segment_padded_pixels);
368379 }
369380 
370381 void opp1_pipe_clock_control(struct output_pixel_processor *opp, bool enable)
....@@ -391,6 +402,8 @@
391402 		.opp_program_bit_depth_reduction = opp1_program_bit_depth_reduction,
392403 		.opp_program_stereo = opp1_program_stereo,
393404 		.opp_pipe_clock_control = opp1_pipe_clock_control,
405
+		.opp_set_disp_pattern_generator = NULL,
406
+		.dpg_is_blanked = NULL,
394407 		.opp_destroy = opp1_destroy
395408 };
396409