.. | .. |
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19 | 19 | #include <linux/io.h> |
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20 | 20 | #include <linux/gpio/driver.h> |
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21 | 21 | #include <linux/of_device.h> |
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22 | | -#include <linux/of_irq.h> |
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23 | 22 | #include <linux/init.h> |
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24 | 23 | #include <linux/irqdomain.h> |
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25 | 24 | #include <linux/irqchip/chained_irq.h> |
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.. | .. |
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127 | 126 | u32 val; |
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128 | 127 | |
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129 | 128 | val = readl(reg_base + GPIO_CONTROL(gpio)) & GPIO_GPCTR0_IOTR_MASK; |
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130 | | - return !!val; |
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| 129 | + return val ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT; |
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131 | 130 | } |
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132 | 131 | |
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133 | 132 | static void bcm_kona_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) |
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.. | .. |
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144 | 143 | raw_spin_lock_irqsave(&kona_gpio->lock, flags); |
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145 | 144 | |
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146 | 145 | /* this function only applies to output pin */ |
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147 | | - if (bcm_kona_gpio_get_dir(chip, gpio) == 1) |
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| 146 | + if (bcm_kona_gpio_get_dir(chip, gpio) == GPIO_LINE_DIRECTION_IN) |
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148 | 147 | goto out; |
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149 | 148 | |
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150 | 149 | reg_offset = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id); |
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.. | .. |
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170 | 169 | reg_base = kona_gpio->reg_base; |
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171 | 170 | raw_spin_lock_irqsave(&kona_gpio->lock, flags); |
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172 | 171 | |
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173 | | - if (bcm_kona_gpio_get_dir(chip, gpio) == 1) |
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| 172 | + if (bcm_kona_gpio_get_dir(chip, gpio) == GPIO_LINE_DIRECTION_IN) |
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174 | 173 | reg_offset = GPIO_IN_STATUS(bank_id); |
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175 | 174 | else |
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176 | 175 | reg_offset = GPIO_OUT_STATUS(bank_id); |
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.. | .. |
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373 | 372 | val = readl(reg_base + GPIO_INT_MASK(bank_id)); |
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374 | 373 | val |= BIT(bit); |
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375 | 374 | writel(val, reg_base + GPIO_INT_MASK(bank_id)); |
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| 375 | + gpiochip_disable_irq(&kona_gpio->gpio_chip, gpio); |
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376 | 376 | |
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377 | 377 | raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); |
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378 | 378 | } |
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.. | .. |
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394 | 394 | val = readl(reg_base + GPIO_INT_MSKCLR(bank_id)); |
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395 | 395 | val |= BIT(bit); |
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396 | 396 | writel(val, reg_base + GPIO_INT_MSKCLR(bank_id)); |
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| 397 | + gpiochip_enable_irq(&kona_gpio->gpio_chip, gpio); |
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397 | 398 | |
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398 | 399 | raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); |
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399 | 400 | } |
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.. | .. |
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485 | 486 | static int bcm_kona_gpio_irq_reqres(struct irq_data *d) |
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486 | 487 | { |
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487 | 488 | struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); |
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488 | | - int ret; |
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489 | 489 | |
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490 | | - ret = gpiochip_lock_as_irq(&kona_gpio->gpio_chip, d->hwirq); |
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491 | | - if (ret) { |
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492 | | - dev_err(kona_gpio->gpio_chip.parent, |
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493 | | - "unable to lock HW IRQ %lu for IRQ\n", |
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494 | | - d->hwirq); |
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495 | | - return ret; |
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496 | | - } |
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497 | | - return 0; |
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| 490 | + return gpiochip_reqres_irq(&kona_gpio->gpio_chip, d->hwirq); |
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498 | 491 | } |
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499 | 492 | |
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500 | 493 | static void bcm_kona_gpio_irq_relres(struct irq_data *d) |
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501 | 494 | { |
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502 | 495 | struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); |
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503 | 496 | |
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504 | | - gpiochip_unlock_as_irq(&kona_gpio->gpio_chip, d->hwirq); |
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| 497 | + gpiochip_relres_irq(&kona_gpio->gpio_chip, d->hwirq); |
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505 | 498 | } |
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506 | 499 | |
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507 | 500 | static struct irq_chip bcm_gpio_irq_chip = { |
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.. | .. |
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574 | 567 | { |
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575 | 568 | struct device *dev = &pdev->dev; |
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576 | 569 | const struct of_device_id *match; |
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577 | | - struct resource *res; |
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578 | 570 | struct bcm_kona_gpio_bank *bank; |
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579 | 571 | struct bcm_kona_gpio *kona_gpio; |
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580 | 572 | struct gpio_chip *chip; |
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.. | .. |
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593 | 585 | |
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594 | 586 | kona_gpio->gpio_chip = template_chip; |
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595 | 587 | chip = &kona_gpio->gpio_chip; |
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596 | | - kona_gpio->num_bank = of_irq_count(dev->of_node); |
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597 | | - if (kona_gpio->num_bank == 0) { |
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| 588 | + ret = platform_irq_count(pdev); |
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| 589 | + if (!ret) { |
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598 | 590 | dev_err(dev, "Couldn't determine # GPIO banks\n"); |
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599 | 591 | return -ENOENT; |
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| 592 | + } else if (ret < 0) { |
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| 593 | + return dev_err_probe(dev, ret, "Couldn't determine GPIO banks\n"); |
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600 | 594 | } |
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| 595 | + kona_gpio->num_bank = ret; |
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| 596 | + |
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601 | 597 | if (kona_gpio->num_bank > GPIO_MAX_BANK_NUM) { |
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602 | 598 | dev_err(dev, "Too many GPIO banks configured (max=%d)\n", |
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603 | 599 | GPIO_MAX_BANK_NUM); |
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.. | .. |
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624 | 620 | return -ENXIO; |
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625 | 621 | } |
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626 | 622 | |
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627 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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628 | | - kona_gpio->reg_base = devm_ioremap_resource(dev, res); |
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| 623 | + kona_gpio->reg_base = devm_platform_ioremap_resource(pdev, 0); |
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629 | 624 | if (IS_ERR(kona_gpio->reg_base)) { |
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630 | | - ret = -ENXIO; |
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| 625 | + ret = PTR_ERR(kona_gpio->reg_base); |
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631 | 626 | goto err_irq_domain; |
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632 | 627 | } |
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633 | 628 | |
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