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2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5 
 kernel/drivers/crypto/ux500/hash/hash_core.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Cryptographic API.
34  * Support for Nomadik hardware crypto engine.
....@@ -8,13 +9,13 @@
89  * Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson.
910  * Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson.
1011  * Author: Andreas Westin <andreas.westin@stericsson.com> for ST-Ericsson.
11
- * License terms: GNU General Public License (GPL) version 2
1212  */
1313 
1414 #define pr_fmt(fmt) "hashX hashX: " fmt
1515 
1616 #include <linux/clk.h>
1717 #include <linux/device.h>
18
+#include <linux/dma-mapping.h>
1819 #include <linux/err.h>
1920 #include <linux/init.h>
2021 #include <linux/io.h>
....@@ -140,7 +141,6 @@
140141 {
141142 	struct dma_async_tx_descriptor *desc = NULL;
142143 	struct dma_chan *channel = NULL;
143
-	dma_cookie_t cookie;
144144 
145145 	if (direction != DMA_TO_DEVICE) {
146146 		dev_err(ctx->device->dev, "%s: Invalid DMA direction\n",
....@@ -176,7 +176,7 @@
176176 	desc->callback = hash_dma_callback;
177177 	desc->callback_param = ctx;
178178 
179
-	cookie = dmaengine_submit(desc);
179
+	dmaengine_submit(desc);
180180 	dma_async_issue_pending(channel);
181181 
182182 	return 0;
....@@ -546,7 +546,7 @@
546546  *
547547  * Initialize structures.
548548  */
549
-static int hash_init(struct ahash_request *req)
549
+static int ux500_hash_init(struct ahash_request *req)
550550 {
551551 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
552552 	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);
....@@ -806,7 +806,7 @@
806806 			 * HW peripheral, otherwise we first copy data
807807 			 * to a local buffer
808808 			 */
809
-			if ((0 == (((u32)data_buffer) % 4)) &&
809
+			if (IS_ALIGNED((unsigned long)data_buffer, 4) &&
810810 			    (0 == *index))
811811 				hash_processblock(device_data,
812812 						  (const u32 *)data_buffer,
....@@ -864,7 +864,8 @@
864864 	if (ret)
865865 		return ret;
866866 
867
-	dev_dbg(device_data->dev, "%s: (ctx=0x%x)!\n", __func__, (u32) ctx);
867
+	dev_dbg(device_data->dev, "%s: (ctx=0x%lx)!\n", __func__,
868
+		(unsigned long)ctx);
868869 
869870 	if (req_ctx->updated) {
870871 		ret = hash_resume_state(device_data, &device_data->state);
....@@ -969,7 +970,8 @@
969970 	if (ret)
970971 		return ret;
971972 
972
-	dev_dbg(device_data->dev, "%s: (ctx=0x%x)!\n", __func__, (u32) ctx);
973
+	dev_dbg(device_data->dev, "%s: (ctx=0x%lx)!\n", __func__,
974
+		(unsigned long)ctx);
973975 
974976 	if (req_ctx->updated) {
975977 		ret = hash_resume_state(device_data, &device_data->state);
....@@ -1071,26 +1073,31 @@
10711073 	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);
10721074 	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);
10731075 	struct crypto_hash_walk walk;
1074
-	int msg_length = crypto_hash_walk_first(req, &walk);
1075
-
1076
-	/* Empty message ("") is correct indata */
1077
-	if (msg_length == 0)
1078
-		return ret;
1076
+	int msg_length;
10791077 
10801078 	index = req_ctx->state.index;
10811079 	buffer = (u8 *)req_ctx->state.buffer;
1080
+
1081
+	ret = hash_get_device_data(ctx, &device_data);
1082
+	if (ret)
1083
+		return ret;
1084
+
1085
+	msg_length = crypto_hash_walk_first(req, &walk);
1086
+
1087
+	/* Empty message ("") is correct indata */
1088
+	if (msg_length == 0) {
1089
+		ret = 0;
1090
+		goto release_dev;
1091
+	}
10821092 
10831093 	/* Check if ctx->state.length + msg_length
10841094 	   overflows */
10851095 	if (msg_length > (req_ctx->state.length.low_word + msg_length) &&
10861096 	    HASH_HIGH_WORD_MAX_VAL == req_ctx->state.length.high_word) {
10871097 		pr_err("%s: HASH_MSG_LENGTH_OVERFLOW!\n", __func__);
1088
-		return -EPERM;
1098
+		ret = crypto_hash_walk_done(&walk, -EPERM);
1099
+		goto release_dev;
10891100 	}
1090
-
1091
-	ret = hash_get_device_data(ctx, &device_data);
1092
-	if (ret)
1093
-		return ret;
10941101 
10951102 	/* Main loop */
10961103 	while (0 != msg_length) {
....@@ -1101,7 +1108,8 @@
11011108 		if (ret) {
11021109 			dev_err(device_data->dev, "%s: hash_internal_hw_update() failed!\n",
11031110 				__func__);
1104
-			goto out;
1111
+			crypto_hash_walk_done(&walk, ret);
1112
+			goto release_dev;
11051113 		}
11061114 
11071115 		msg_length = crypto_hash_walk_done(&walk, 0);
....@@ -1111,7 +1119,7 @@
11111119 	dev_dbg(device_data->dev, "%s: indata length=%d, bin=%d\n",
11121120 		__func__, req_ctx->state.index, req_ctx->state.bit_index);
11131121 
1114
-out:
1122
+release_dev:
11151123 	release_hash_device(device_data);
11161124 
11171125 	return ret;
....@@ -1273,8 +1281,8 @@
12731281 	else
12741282 		loop_ctr = SHA256_DIGEST_SIZE / sizeof(u32);
12751283 
1276
-	dev_dbg(device_data->dev, "%s: digest array:(0x%x)\n",
1277
-		__func__, (u32) digest);
1284
+	dev_dbg(device_data->dev, "%s: digest array:(0x%lx)\n",
1285
+		__func__, (unsigned long)digest);
12781286 
12791287 	/* Copy result into digest array */
12801288 	for (count = 0; count < loop_ctr; count++) {
....@@ -1359,7 +1367,7 @@
13591367 	ctx->config.oper_mode = HASH_OPER_MODE_HASH;
13601368 	ctx->digestsize = SHA1_DIGEST_SIZE;
13611369 
1362
-	return hash_init(req);
1370
+	return ux500_hash_init(req);
13631371 }
13641372 
13651373 static int ahash_sha256_init(struct ahash_request *req)
....@@ -1372,7 +1380,7 @@
13721380 	ctx->config.oper_mode = HASH_OPER_MODE_HASH;
13731381 	ctx->digestsize = SHA256_DIGEST_SIZE;
13741382 
1375
-	return hash_init(req);
1383
+	return ux500_hash_init(req);
13761384 }
13771385 
13781386 static int ahash_sha1_digest(struct ahash_request *req)
....@@ -1425,7 +1433,7 @@
14251433 	ctx->config.oper_mode	= HASH_OPER_MODE_HMAC;
14261434 	ctx->digestsize		= SHA1_DIGEST_SIZE;
14271435 
1428
-	return hash_init(req);
1436
+	return ux500_hash_init(req);
14291437 }
14301438 
14311439 static int hmac_sha256_init(struct ahash_request *req)
....@@ -1438,7 +1446,7 @@
14381446 	ctx->config.oper_mode	= HASH_OPER_MODE_HMAC;
14391447 	ctx->digestsize		= SHA256_DIGEST_SIZE;
14401448 
1441
-	return hash_init(req);
1449
+	return ux500_hash_init(req);
14421450 }
14431451 
14441452 static int hmac_sha1_digest(struct ahash_request *req)
....@@ -1515,7 +1523,7 @@
15151523 		.conf.algorithm = HASH_ALGO_SHA1,
15161524 		.conf.oper_mode = HASH_OPER_MODE_HASH,
15171525 		.hash = {
1518
-			.init = hash_init,
1526
+			.init = ux500_hash_init,
15191527 			.update = ahash_update,
15201528 			.final = ahash_final,
15211529 			.digest = ahash_sha1_digest,
....@@ -1538,7 +1546,7 @@
15381546 		.conf.algorithm	= HASH_ALGO_SHA256,
15391547 		.conf.oper_mode	= HASH_OPER_MODE_HASH,
15401548 		.hash = {
1541
-			.init = hash_init,
1549
+			.init = ux500_hash_init,
15421550 			.update	= ahash_update,
15431551 			.final = ahash_final,
15441552 			.digest = ahash_sha256_digest,
....@@ -1561,7 +1569,7 @@
15611569 		.conf.algorithm = HASH_ALGO_SHA1,
15621570 		.conf.oper_mode = HASH_OPER_MODE_HMAC,
15631571 			.hash = {
1564
-			.init = hash_init,
1572
+			.init = ux500_hash_init,
15651573 			.update = ahash_update,
15661574 			.final = ahash_final,
15671575 			.digest = hmac_sha1_digest,
....@@ -1585,7 +1593,7 @@
15851593 		.conf.algorithm = HASH_ALGO_SHA256,
15861594 		.conf.oper_mode = HASH_OPER_MODE_HMAC,
15871595 		.hash = {
1588
-			.init = hash_init,
1596
+			.init = ux500_hash_init,
15891597 			.update = ahash_update,
15901598 			.final = ahash_final,
15911599 			.digest = hmac_sha256_digest,