修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/drivers/clk/clk-fractional-divider.c
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@@ -1,9 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0
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 /*
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  * Copyright (C) 2014 Intel Corporation
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  *
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  * Adjustable fractional divider clock implementation.
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  * Output rate = (m / n) * parent_rate.
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@@ -11,10 +8,27 @@
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  */
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 #include <linux/clk-provider.h>
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+#include <linux/io.h>
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 #include <linux/module.h>
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 #include <linux/device.h>
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 #include <linux/slab.h>
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 #include <linux/rational.h>
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+
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+static inline u32 clk_fd_readl(struct clk_fractional_divider *fd)
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+{
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+	if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
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+		return ioread32be(fd->reg);
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+
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+	return readl(fd->reg);
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+}
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+
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+static inline void clk_fd_writel(struct clk_fractional_divider *fd, u32 val)
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+{
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+	if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
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+		iowrite32be(val, fd->reg);
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+	else
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+		writel(val, fd->reg);
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+}
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 static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
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 					unsigned long parent_rate)
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@@ -30,7 +44,7 @@
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 	else
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 		__acquire(fd->lock);
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-	val = clk_readl(fd->reg);
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+	val = clk_fd_readl(fd);
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 	if (fd->lock)
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 		spin_unlock_irqrestore(fd->lock, flags);
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@@ -39,6 +53,11 @@
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 	m = (val & fd->mmask) >> fd->mshift;
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 	n = (val & fd->nmask) >> fd->nshift;
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+
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+	if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
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+		m++;
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+		n++;
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+	}
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 	if (!n || !m)
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 		return parent_rate;
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@@ -77,16 +96,13 @@
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 	unsigned long m, n;
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 	u64 ret;
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-	if (!rate)
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+	if (!rate && rate >= *parent_rate)
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 		return *parent_rate;
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-	if (fd->approximation) {
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+	if (fd->approximation)
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 		fd->approximation(hw, rate, parent_rate, &m, &n);
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-	} else {
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-		if (rate >= *parent_rate)
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-			return *parent_rate;
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+	else
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 		clk_fd_general_approximation(hw, rate, parent_rate, &m, &n);
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-	}
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 	ret = (u64)*parent_rate * m;
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 	do_div(ret, n);
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@@ -106,6 +122,10 @@
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 			GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
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 			&m, &n);
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+	if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
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+		m--;
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+		n--;
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+	}
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 	/*
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 	 * When compensation the fractional divider,
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 	 * the [1:0] bits of the numerator register are omitted,
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@@ -138,10 +158,10 @@
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 	else
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 		__acquire(fd->lock);
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-	val = clk_readl(fd->reg);
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+	val = clk_fd_readl(fd);
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 	val &= ~(fd->mmask | fd->nmask);
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 	val |= (m << fd->mshift) | (n << fd->nshift);
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-	clk_writel(val, fd->reg);
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+	clk_fd_writel(fd, val);
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 	if (fd->lock)
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 		spin_unlock_irqrestore(fd->lock, flags);
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@@ -164,7 +184,7 @@
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 		u8 clk_divider_flags, spinlock_t *lock)
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 {
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 	struct clk_fractional_divider *fd;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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 	struct clk_hw *hw;
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 	int ret;
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@@ -174,7 +194,7 @@
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 	init.name = name;
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 	init.ops = &clk_fractional_divider_ops;
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-	init.flags = flags | CLK_IS_BASIC;
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+	init.flags = flags;
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 	init.parent_names = parent_name ? &parent_name : NULL;
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 	init.num_parents = parent_name ? 1 : 0;
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