| .. | .. |
|---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
|---|
| 1 | 2 | /* |
|---|
| 2 | 3 | * ICSWX api |
|---|
| 3 | 4 | * |
|---|
| 4 | 5 | * Copyright (C) 2015 IBM Corp. |
|---|
| 5 | | - * |
|---|
| 6 | | - * This program is free software; you can redistribute it and/or |
|---|
| 7 | | - * modify it under the terms of the GNU General Public License |
|---|
| 8 | | - * as published by the Free Software Foundation; either version |
|---|
| 9 | | - * 2 of the License, or (at your option) any later version. |
|---|
| 10 | 6 | * |
|---|
| 11 | 7 | * This provides the Initiate Coprocessor Store Word Indexed (ICSWX) |
|---|
| 12 | 8 | * instruction. This instruction is used to communicate with PowerPC |
|---|
| .. | .. |
|---|
| 81 | 77 | #define CSB_CC_CHAIN (37) |
|---|
| 82 | 78 | #define CSB_CC_SEQUENCE (38) |
|---|
| 83 | 79 | #define CSB_CC_HW (39) |
|---|
| 80 | +/* P9 DD2 NX Workbook 3.2 (Table 4-36): Address translation fault */ |
|---|
| 81 | +#define CSB_CC_FAULT_ADDRESS (250) |
|---|
| 84 | 82 | |
|---|
| 85 | 83 | #define CSB_SIZE (0x10) |
|---|
| 86 | 84 | #define CSB_ALIGN CSB_SIZE |
|---|
| .. | .. |
|---|
| 112 | 110 | __be64 address; |
|---|
| 113 | 111 | } __packed __aligned(DDE_ALIGN); |
|---|
| 114 | 112 | |
|---|
| 113 | +/* 4.3.2 NX-stamped Fault CRB */ |
|---|
| 114 | + |
|---|
| 115 | +#define NX_STAMP_ALIGN (0x10) |
|---|
| 116 | + |
|---|
| 117 | +struct nx_fault_stamp { |
|---|
| 118 | + __be64 fault_storage_addr; |
|---|
| 119 | + __be16 reserved; |
|---|
| 120 | + __u8 flags; |
|---|
| 121 | + __u8 fault_status; |
|---|
| 122 | + __be32 pswid; |
|---|
| 123 | +} __packed __aligned(NX_STAMP_ALIGN); |
|---|
| 115 | 124 | |
|---|
| 116 | 125 | /* Chapter 6.5.2 Coprocessor-Request Block (CRB) */ |
|---|
| 117 | 126 | |
|---|
| .. | .. |
|---|
| 139 | 148 | |
|---|
| 140 | 149 | struct coprocessor_completion_block ccb; |
|---|
| 141 | 150 | |
|---|
| 142 | | - u8 reserved[48]; |
|---|
| 151 | + union { |
|---|
| 152 | + struct nx_fault_stamp nx; |
|---|
| 153 | + u8 reserved[16]; |
|---|
| 154 | + } stamp; |
|---|
| 155 | + |
|---|
| 156 | + u8 reserved[32]; |
|---|
| 143 | 157 | |
|---|
| 144 | 158 | struct coprocessor_status_block csb; |
|---|
| 145 | | -} __packed __aligned(CRB_ALIGN); |
|---|
| 146 | | - |
|---|
| 159 | +} __aligned(128); |
|---|
| 147 | 160 | |
|---|
| 148 | 161 | /* RFC02167 Initiate Coprocessor Instructions document |
|---|
| 149 | 162 | * Chapter 8.2.1.1.1 RS |
|---|
| .. | .. |
|---|
| 174 | 187 | __be64 ccw_reg = ccw; |
|---|
| 175 | 188 | u32 cr; |
|---|
| 176 | 189 | |
|---|
| 190 | + /* NB: the same structures are used by VAS-NX */ |
|---|
| 191 | + BUILD_BUG_ON(sizeof(*crb) != 128); |
|---|
| 192 | + |
|---|
| 177 | 193 | __asm__ __volatile__( |
|---|
| 178 | 194 | PPC_ICSWX(%1,0,%2) "\n" |
|---|
| 179 | 195 | "mfcr %0\n" |
|---|