hc
2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5
kernel/arch/parisc/include/asm/bitops.h
....@@ -12,21 +12,6 @@
1212 #include <asm/barrier.h>
1313 #include <linux/atomic.h>
1414
15
-/*
16
- * HP-PARISC specific bit operations
17
- * for a detailed description of the functions please refer
18
- * to include/asm-i386/bitops.h or kerneldoc
19
- */
20
-
21
-#if __BITS_PER_LONG == 64
22
-#define SHIFT_PER_LONG 6
23
-#else
24
-#define SHIFT_PER_LONG 5
25
-#endif
26
-
27
-#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1))
28
-
29
-
3015 /* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
3116 * on use of volatile and __*_bit() (set/clear/change):
3217 * *_bit() want use of volatile.
....@@ -35,10 +20,10 @@
3520
3621 static __inline__ void set_bit(int nr, volatile unsigned long * addr)
3722 {
38
- unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
23
+ unsigned long mask = BIT_MASK(nr);
3924 unsigned long flags;
4025
41
- addr += (nr >> SHIFT_PER_LONG);
26
+ addr += BIT_WORD(nr);
4227 _atomic_spin_lock_irqsave(addr, flags);
4328 *addr |= mask;
4429 _atomic_spin_unlock_irqrestore(addr, flags);
....@@ -46,21 +31,21 @@
4631
4732 static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
4833 {
49
- unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr));
34
+ unsigned long mask = BIT_MASK(nr);
5035 unsigned long flags;
5136
52
- addr += (nr >> SHIFT_PER_LONG);
37
+ addr += BIT_WORD(nr);
5338 _atomic_spin_lock_irqsave(addr, flags);
54
- *addr &= mask;
39
+ *addr &= ~mask;
5540 _atomic_spin_unlock_irqrestore(addr, flags);
5641 }
5742
5843 static __inline__ void change_bit(int nr, volatile unsigned long * addr)
5944 {
60
- unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
45
+ unsigned long mask = BIT_MASK(nr);
6146 unsigned long flags;
6247
63
- addr += (nr >> SHIFT_PER_LONG);
48
+ addr += BIT_WORD(nr);
6449 _atomic_spin_lock_irqsave(addr, flags);
6550 *addr ^= mask;
6651 _atomic_spin_unlock_irqrestore(addr, flags);
....@@ -68,12 +53,12 @@
6853
6954 static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
7055 {
71
- unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
56
+ unsigned long mask = BIT_MASK(nr);
7257 unsigned long old;
7358 unsigned long flags;
7459 int set;
7560
76
- addr += (nr >> SHIFT_PER_LONG);
61
+ addr += BIT_WORD(nr);
7762 _atomic_spin_lock_irqsave(addr, flags);
7863 old = *addr;
7964 set = (old & mask) ? 1 : 0;
....@@ -86,12 +71,12 @@
8671
8772 static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
8873 {
89
- unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
74
+ unsigned long mask = BIT_MASK(nr);
9075 unsigned long old;
9176 unsigned long flags;
9277 int set;
9378
94
- addr += (nr >> SHIFT_PER_LONG);
79
+ addr += BIT_WORD(nr);
9580 _atomic_spin_lock_irqsave(addr, flags);
9681 old = *addr;
9782 set = (old & mask) ? 1 : 0;
....@@ -104,11 +89,11 @@
10489
10590 static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
10691 {
107
- unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
92
+ unsigned long mask = BIT_MASK(nr);
10893 unsigned long oldbit;
10994 unsigned long flags;
11095
111
- addr += (nr >> SHIFT_PER_LONG);
96
+ addr += BIT_WORD(nr);
11297 _atomic_spin_lock_irqsave(addr, flags);
11398 oldbit = *addr;
11499 *addr = oldbit ^ mask;
....@@ -188,7 +173,7 @@
188173 * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
189174 */
190175
191
-static __inline__ int fls(int x)
176
+static __inline__ int fls(unsigned int x)
192177 {
193178 int ret;
194179 if (!x)