~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,28 +1,15 @@
	1	+/* SPDX-License-Identifier: GPL-2.0-only */
1	2	/*
2	3	* Copyright (C) 2012 ARM Ltd.
3		- *
4		- * This program is free software; you can redistribute it and/or modify
5		- * it under the terms of the GNU General Public License version 2 as
6		- * published by the Free Software Foundation.
7		- *
8		- * This program is distributed in the hope that it will be useful,
9		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
10		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11		- * GNU General Public License for more details.
12		- *
13		- * You should have received a copy of the GNU General Public License
14		- * along with this program. If not, see <http://www.gnu.org/licenses/>.
15	4	*/
16	5	#ifndef __ASM_MODULE_H
17	6	#define __ASM_MODULE_H
18	7
19	8	#include <asm-generic/module.h>
20	9
21		-#define MODULE_ARCH_VERMAGIC "aarch64"
22		-
23	10	#ifdef CONFIG_ARM64_MODULE_PLTS
24	11	struct mod_plt_sec {
25		- struct elf64_shdr *plt;
	12	+ int plt_shndx;
26	13	int plt_num_entries;
27	14	int plt_max_entries;
28	15	};
..	..	@@ -32,14 +19,22 @@
32	19	struct mod_plt_sec init;
33	20
34	21	/* for CONFIG_DYNAMIC_FTRACE */
35		- struct plt_entry *ftrace_trampoline;
	22	+ struct plt_entry *ftrace_trampolines;
	23	+
	24	+ /* for FIPS 140 certified kernel module */
	25	+ const Elf64_Rela *text_relocations;
	26	+ const Elf64_Rela *rodata_relocations;
	27	+ int num_text_relocations;
	28	+ int num_rodata_relocations;
36	29	};
37	30	#endif
38	31
39		-u64 module_emit_plt_entry(struct module mod, void loc, const Elf64_Rela *rela,
	32	+u64 module_emit_plt_entry(struct module mod, Elf64_Shdr sechdrs,
	33	+ void loc, const Elf64_Rela rela,
40	34	Elf64_Sym *sym);
41	35
42		-u64 module_emit_veneer_for_adrp(struct module mod, void loc, u64 val);
	36	+u64 module_emit_veneer_for_adrp(struct module mod, Elf64_Shdr sechdrs,
	37	+ void *loc, u64 val);
43	38
44	39	#ifdef CONFIG_RANDOMIZE_BASE
45	40	extern u64 module_alloc_base;
..	..	@@ -56,39 +51,24 @@
56	51	* is exactly what we are dealing with here, we are free to use x16
57	52	* as a scratch register in the PLT veneers.
58	53	*/
59		- __le32 mov0; /* movn x16, #0x.... */
60		- __le32 mov1; /* movk x16, #0x...., lsl #16 */
61		- __le32 mov2; /* movk x16, #0x...., lsl #32 */
	54	+ __le32 adrp; /* adrp x16, .... */
	55	+ __le32 add; /* add x16, x16, #0x.... */
62	56	__le32 br; /* br x16 */
63	57	};
64	58
65		-static inline struct plt_entry get_plt_entry(u64 val)
	59	+static inline bool is_forbidden_offset_for_adrp(void *place)
66	60	{
67		- /*
68		- * MOVK/MOVN/MOVZ opcode:
69		- * +--------+------------+--------+-----------+-------------+---------+
70		- * \| sf[31] \| opc[30:29] \| 100101 \| hw[22:21] \| imm16[20:5] \| Rd[4:0] \|
71		- * +--------+------------+--------+-----------+-------------+---------+
72		- *
73		- * Rd := 0x10 (x16)
74		- * hw := 0b00 (no shift), 0b01 (lsl #16), 0b10 (lsl #32)
75		- * opc := 0b11 (MOVK), 0b00 (MOVN), 0b10 (MOVZ)
76		- * sf := 1 (64-bit variant)
77		- */
78		- return (struct plt_entry){
79		- cpu_to_le32(0x92800010 \| (((~val ) & 0xffff)) << 5),
80		- cpu_to_le32(0xf2a00010 \| ((( val >> 16) & 0xffff)) << 5),
81		- cpu_to_le32(0xf2c00010 \| ((( val >> 32) & 0xffff)) << 5),
82		- cpu_to_le32(0xd61f0200)
83		- };
	61	+ return IS_ENABLED(CONFIG_ARM64_ERRATUM_843419) &&
	62	+ cpus_have_const_cap(ARM64_WORKAROUND_843419) &&
	63	+ ((u64)place & 0xfff) >= 0xff8;
84	64	}
85	65
86		-static inline bool plt_entries_equal(const struct plt_entry *a,
87		- const struct plt_entry *b)
	66	+struct plt_entry get_plt_entry(u64 dst, void *pc);
	67	+bool plt_entries_equal(const struct plt_entry a, const struct plt_entry b);
	68	+
	69	+static inline bool plt_entry_is_initialized(const struct plt_entry *e)
88	70	{
89		- return a->mov0 == b->mov0 &&
90		- a->mov1 == b->mov1 &&
91		- a->mov2 == b->mov2;
	71	+ return e->adrp \|\| e->add \|\| e->br;
92	72	}
93	73
94	74	#endif /* __ASM_MODULE_H */