修改4g拨号为QMI,需要在系统里后台执行quectel-CM

hc

2024-10-22 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5

 kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
..
..
@@ -141,6 +141,27 @@
141
141
 		default-brightness-level = <200>;
142
142
 	};
143
143
 
144
+	bt_sco: bt-sco {
145
+		status = "disabled";
146
+		compatible = "delta,dfbmcs320";
147
+		#sound-dai-cells = <1>;
148
+	};
149
+
150
+	bt_sound: bt-sound {
151
+		status = "disabled";
152
+		compatible = "simple-audio-card";
153
+		simple-audio-card,format = "dsp_a";
154
+		simple-audio-card,bitclock-inversion = <0>;
155
+		simple-audio-card,mclk-fs = <256>;
156
+		simple-audio-card,name = "rockchip,bt";
157
+		simple-audio-card,cpu {
158
+			sound-dai = <&i2s3_2ch>;
159
+		};
160
+		simple-audio-card,codec {
161
+			sound-dai = <&bt_sco 1>;
162
+		};
163
+	};
164
+
144
165
 	dc_12v: dc-12v {
145
166
 		compatible = "regulator-fixed";
146
167
 		regulator-name = "dc_12v";
..
..
@@ -151,21 +172,39 @@
151
172
 	};
152
173
 
153
174
 	hdmi_sound: hdmi-sound {
175
+		compatible = "simple-audio-card";
176
+		simple-audio-card,format = "i2s";
177
+		simple-audio-card,mclk-fs = <128>;
178
+		simple-audio-card,name = "rockchip,hdmi";
154
179
 		status = "disabled";
155
-		compatible = "rockchip,hdmi";
156
-		rockchip,mclk-fs = <128>;
157
-		rockchip,card-name = "rockchip,hdmi";
158
-		rockchip,cpu = <&i2s0_8ch>;
159
-		rockchip,codec = <&hdmi>;
160
-	};
161
180
 
162
-	leds: leds {
163
-		compatible = "gpio-leds";
164
-		sys_led: sys_led {
165
-			gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
166
-			linux,default-trigger = "heartbeat";
181
+		simple-audio-card,cpu {
182
+				sound-dai = <&i2s0_8ch>;
183
+		};
184
+		simple-audio-card,codec {
185
+				sound-dai = <&hdmi>;
167
186
 		};
168
187
 	};
188
+/*
189
+	leds: leds {
190
+		compatible = "gpio-leds";
191
+		run_led: run_led {
192
+			gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
193
+			default-state = "on";
194
+//			linux,default-trigger = "heartbeat";
195
+		};
196
+		
197
+		sig_led: sig_led {
198
+			gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
199
+			default-state = "on";
200
+		};
201
+		
202
+		err_led: err_led {
203
+			gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
204
+			default-state = "on";
205
+		};
206
+		
207
+	};*/
169
208
 
170
209
 	pdmics: dummy-codec {
171
210
 		status = "disabled";
..
..
@@ -291,7 +330,6 @@
291
330
 		regulator-min-microvolt = <3300000>;
292
331
 		regulator-max-microvolt = <3300000>;
293
332
 		enable-active-high;
294
-		gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;  //VCC3_IO_EN_GPIO0_C4_3V3
295
333
 		vin-supply = <&vcc3v3_sys>;
296
334
 
297
335
 		regulator-state-mem {
..
..
@@ -306,7 +344,6 @@
306
344
 		regulator-min-microvolt = <3300000>;
307
345
 		regulator-max-microvolt = <3300000>;
308
346
 		enable-active-high;
309
-		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
310
347
 		vin-supply = <&vcc3v3_sys>;
311
348
 
312
349
 		regulator-state-mem {
..
..
@@ -335,6 +372,8 @@
335
372
 		compatible = "wlan-platdata";
336
373
 		rockchip,grf = <&grf>;
337
374
 		wifi_chip_type = "ap6398s";
375
+		clocks = <&rk809 1>;
376
+		clock-names = "ext_clock";
338
377
 		status = "okay";
339
378
 	};
340
379
 
..
..
@@ -364,30 +403,6 @@
364
403
 	status = "okay";
365
404
 };
366
405
 
367
-&can0 {
368
-	assigned-clocks = <&cru CLK_CAN0>;
369
-	assigned-clock-rates = <150000000>;
370
-	pinctrl-names = "default";
371
-	pinctrl-0 = <&can0m1_pins>;
372
-	status = "disabled";
373
-};
374
-
375
-&can1 {
376
-	assigned-clocks = <&cru CLK_CAN1>;
377
-	assigned-clock-rates = <150000000>;
378
-	pinctrl-names = "default";
379
-	pinctrl-0 = <&can1m1_pins>;
380
-	status = "disabled";
381
-};
382
-
383
-&can2 {
384
-	assigned-clocks = <&cru CLK_CAN2>;
385
-	assigned-clock-rates = <150000000>;
386
-	pinctrl-names = "default";
387
-	pinctrl-0 = <&can2m1_pins>;
388
-	status = "disabled";
389
-};
390
-
391
406
 &cpu0 {
392
407
 	cpu-supply = <&vdd_cpu>;
393
408
 };
..
..
@@ -395,6 +410,7 @@
395
410
 &dfi {
396
411
 	status = "okay";
397
412
 };
413
+
398
414
 
399
415
 &dmc {
400
416
 	center-supply = <&vdd_logic>;
..
..
@@ -884,10 +900,10 @@
884
900
             15 05 01 29 
885
901
         ];
886
902
 
887
-        panel-exit-sequence = [
888
-                05 00 01 28
889
-                05 00 01 10
890
-        ];
903
+		panel-exit-sequence = [
904
+			05 00 01 28
905
+			05 00 01 10
906
+		];
891
907
 
892
908
          disp_timings1: display-timings {
893
909
                                         native-mode = <&dsi1_timing0>;
..
..
@@ -940,13 +956,34 @@
940
956
 	status = "okay";
941
957
 };
942
958
 
959
+&hdmi {
960
+	status = "okay";
961
+	rockchip,phy-table =
962
+		<92812500  0x8009 0x0000 0x0270>,
963
+		<165000000 0x800b 0x0000 0x026d>,
964
+		<185625000 0x800b 0x0000 0x01ed>,
965
+		<297000000 0x800b 0x0000 0x01ad>,
966
+		<594000000 0x8029 0x0000 0x0088>,
967
+		<000000000 0x0000 0x0000 0x0000>;
968
+};
943
969
 
970
+&hdmi_in_vp0 {
971
+	status = "okay";
972
+};
973
+
974
+&hdmi_in_vp1 {
975
+	status = "disabled";
976
+};
977
+
978
+&hdmi_sound {
979
+	status = "okay";
980
+};
944
981
 
945
982
 &i2c0 {
946
983
 	status = "okay";
947
984
 
948
985
 	vdd_cpu: tcs4525@1c {
949
-		compatible = "tcs,tcs452x";
986
+		compatible = "tcs,tcs4525";
950
987
 		reg = <0x1c>;
951
988
 		vin-supply = <&vcc5v0_sys>;
952
989
 		regulator-compatible = "fan53555-reg";
..
..
@@ -954,7 +991,6 @@
954
991
 		regulator-min-microvolt = <712500>;
955
992
 		regulator-max-microvolt = <1390000>;
956
993
 		regulator-init-microvolt = <900000>;
957
-		regulator-initial-mode = <1>;
958
994
 		regulator-ramp-delay = <2300>;
959
995
 		fcs,suspend-voltage-selector = <1>;
960
996
 		regulator-boot-on;
..
..
@@ -1116,8 +1152,8 @@
1116
1152
 			vccio_acodec: LDO_REG4 {
1117
1153
 				regulator-always-on;
1118
1154
 				regulator-boot-on;
1119
-				regulator-min-microvolt = <3300000>;
1120
-				regulator-max-microvolt = <3300000>;
1155
+				regulator-min-microvolt = <3000000>;
1156
+				regulator-max-microvolt = <3000000>;
1121
1157
 				regulator-name = "vccio_acodec";
1122
1158
 				regulator-state-mem {
1123
1159
 					regulator-off-in-suspend;
..
..
@@ -1230,16 +1266,7 @@
1230
1266
 };
1231
1267
 
1232
1268
 &i2c1 {
1233
-	status = "okay";
1234
-
1235
-	gt1x: gt1x@14 {
1236
-		compatible = "goodix,gt1x";
1237
-		reg = <0x14>;
1238
-		pinctrl-names = "default";
1239
-		pinctrl-0 = <&touch_gpio>;
1240
-		goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
1241
-		goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
1242
-	};
1269
+	status = "disabled";
1243
1270
 };
1244
1271
 
1245
1272
 &i2c5 {
..
..
@@ -1272,6 +1299,11 @@
1272
1299
 		     &i2s1m0_lrcktx
1273
1300
 		     &i2s1m0_sdi0
1274
1301
 		     &i2s1m0_sdo0>;
1302
+};
1303
+
1304
+&i2s3_2ch {
1305
+	rockchip,bclk-fs = <32>;
1306
+	status = "disabled";
1275
1307
 };
1276
1308
 
1277
1309
 &iep {
..
..
@@ -1310,6 +1342,7 @@
1310
1342
 
1311
1343
 &pinctrl {
1312
1344
 
1345
+
1313
1346
 	mxc6655xa {
1314
1347
 		mxc6655xa_irq_gpio: mxc6655xa_irq_gpio {
1315
1348
 			rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
..
..
@@ -1324,12 +1357,12 @@
1324
1357
 
1325
1358
 		soc_slppin_gpio: soc_slppin_gpio {
1326
1359
 			rockchip,pins =
1327
-				<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
1360
+				<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
1328
1361
 		};
1329
1362
 
1330
1363
 		soc_slppin_slp: soc_slppin_slp {
1331
1364
 			rockchip,pins =
1332
-				<0 RK_PA2 1 &pcfg_pull_up>;
1365
+				<0 RK_PA2 1 &pcfg_pull_none>;
1333
1366
 		};
1334
1367
 
1335
1368
 		soc_slppin_rst: soc_slppin_rst {
..
..
@@ -1410,7 +1443,7 @@
1410
1443
 };
1411
1444
 
1412
1445
 &pwm7 {
1413
-	status = "okay";
1446
+	status = "disabled";
1414
1447
 
1415
1448
 	compatible = "rockchip,remotectl-pwm";
1416
1449
 	remote_pwm_id = <3>;
..
..
@@ -1544,7 +1577,10 @@
1544
1577
 	status = "okay";
1545
1578
 };
1546
1579
 
1547
-
1580
+&route_hdmi {
1581
+	status = "okay";
1582
+	connect = <&vp0_out_hdmi>;
1583
+};
1548
1584
 
1549
1585
 &saradc {
1550
1586
 	status = "okay";
..
..
@@ -1553,15 +1589,18 @@
1553
1589
 
1554
1590
 &sdhci {
1555
1591
 	bus-width = <8>;
1556
-	supports-emmc;
1592
+	no-sdio;
1593
+	no-sd;
1557
1594
 	non-removable;
1558
1595
 	max-frequency = <200000000>;
1596
+	full-pwr-cycle-in-suspend;
1559
1597
 	status = "okay";
1560
1598
 };
1561
1599
 
1562
1600
 &sdmmc0 {
1563
1601
 	max-frequency = <150000000>;
1564
-	supports-sd;
1602
+	no-sdio;
1603
+	no-mmc;
1565
1604
 	bus-width = <4>;
1566
1605
 	cap-mmc-highspeed;
1567
1606
 	cap-sd-highspeed;
..
..
@@ -1579,7 +1618,7 @@
1579
1618
 };
1580
1619
 
1581
1620
 &spdif_8ch {
1582
-	status = "okay";
1621
+	status = "disabled";
1583
1622
 };
1584
1623
 
1585
1624
 &tsadc {
..
..
@@ -1631,7 +1670,7 @@
1631
1670
 };
1632
1671
 
1633
1672
 &usbdrd_dwc3 {
1634
-	dr_mode = "otg";
1673
+	dr_mode = "host";
1635
1674
 	extcon = <&usb2phy0>;
1636
1675
 	status = "okay";
1637
1676
 };
..
..
@@ -1641,15 +1680,6 @@
1641
1680
 };
1642
1681
 
1643
1682
 &usbhost_dwc3 {
1644
-//	phys = <&u2phy0_host>;
1645
-//	phy-names = "usb2-phy";
1646
-//	maximum-speed = "high-speed";
1647
-//	snps,dis_u2_susphy_quirk;
1648
-	status = "okay";
1649
-};
1650
-
1651
-&combphy1_usq {
1652
-//	rockchip,dis-u3otg1-port;
1653
1683
 	status = "okay";
1654
1684
 };
1655
1685
 
..
..
@@ -1682,8 +1712,8 @@
1682
1712
 
1683
1713
 &vop {
1684
1714
 	status = "okay";
1685
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
1686
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
1715
+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
1716
+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>, <&cru PLL_GPLL>;
1687
1717
 };
1688
1718
 
1689
1719
 &vop_mmu {