~hc/RK356X_SDK_RELEASE.git

old mode 100644new mode 100755

..	..	@@ -8,12 +8,21 @@
8	8
9	9	#include <dt-bindings/gpio/gpio.h>
10	10	#include <dt-bindings/pinctrl/rockchip.h>
	11	+#include <dt-bindings/display/media-bus-format.h>
11	12	#include "rk3568.dtsi"
12	13	#include "rk3568-evb.dtsi"
13	14
14	15	/ {
15	16	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
16	17	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
	18	+
	19	+ rk_headset: rk-headset {
	20	+ compatible = "rockchip_headset";
	21	+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
	22	+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
	23	+ pinctrl-names = "default";
	24	+ pinctrl-0 = <&hp_det>;
	25	+ };
17	26
18	27	vcc2v5_sys: vcc2v5-ddr {
19	28	compatible = "regulator-fixed";
..	..	@@ -25,15 +34,6 @@
25	34	vin-supply = <&vcc3v3_sys>;
26	35	};
27	36
28		- vcc3v3_vga: vcc3v3-vga {
29		- compatible = "regulator-fixed";
30		- regulator-name = "vcc3v3_vga";
31		- regulator-always-on;
32		- regulator-boot-on;
33		- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
34		- enable-active-high;
35		- vin-supply = <&vcc3v3_sys>;
36		- };
37	37
38	38	pcie30_avdd0v9: pcie30-avdd0v9 {
39	39	compatible = "regulator-fixed";
..	..	@@ -60,7 +60,9 @@
60	60	regulator-name = "vcc3v3_pcie";
61	61	regulator-min-microvolt = <3300000>;
62	62	regulator-max-microvolt = <3300000>;
	63	+ regulator-always-on;
63	64	enable-active-high;
	65	+ regulator-boot-on;
64	66	gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
65	67	startup-delay-us = <5000>;
66	68	vin-supply = <&dc_12v>;
..	..	@@ -85,6 +87,24 @@
85	87	enable-active-high;
86	88	regulator-always-on;
87	89	regulator-boot-on;
	90	+ };
	91	+#endif
	92	+
	93	+#if 0
	94	+ leds: leds {
	95	+ compatible = "gpio-leds";
	96	+ sig_led: sig_led {
	97	+ gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
	98	+ default-state = "on";
	99	+ };
	100	+ };
	101	+
	102	+ leds: leds {
	103	+ compatible = "gpio-leds";
	104	+ err_led: err_led {
	105	+ gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
	106	+ default-state = "on";
	107	+ };
88	108	};
89	109	#endif
90	110
..	..	@@ -105,16 +125,26 @@
105	125	gpio_function = <0>;
106	126	};
107	127
108		- hub_host2_rst {
109		- gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
	128	+ vcc_3.3v {
	129	+ gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
	130	+ gpio_function = <0>;
	131	+ };
	132	+
	133	+ ax88772_rst {
	134	+ gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; //AX88772_RST_GPIO3_B5_3V3
110	135	gpio_function = <3>;
111	136	};
112	137
	138	+ ax88631_rst {
	139	+ gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; //AX88772_RST_GPIO3_B6_3V3
	140	+ gpio_function = <3>;
	141	+ };
	142	+/*
113	143	hub_host3 {
114	144	gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
115	145	gpio_function = <0>;
116	146	};
117		-
	147	+*/
118	148	wake_4g {
119	149	gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
120	150	gpio_function = <0>;
..	..	@@ -135,10 +165,10 @@
135	165	gpio_function = <0>;
136	166	};
137	167
138		- hp_en {
139		- gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
140		- gpio_function = <0>;
141		- };
	168	+ //gpio99 {
	169	+ // gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
	170	+ // gpio_function = <1>;
	171	+ //};
142	172
143	173	wifi_power_en {
144	174	gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
..	..	@@ -185,7 +215,69 @@
185	215	gpio_function = <1>;
186	216	};
187	217	#endif
188		-};
	218	+ };
	219	+#if 0
	220	+ nk_io_init {
	221	+ compatible = "nk_io_control";
	222	+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
	223	+ hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
	224	+ hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
	225	+ vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	226	+ vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
	227	+ en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
	228	+ reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
	229	+ air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
	230	+ wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
	231	+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
	232	+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
	233	+ wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
	234	+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
	235	+ pinctrl-names = "default";
	236	+ pinctrl-0 = <&nk_io_gpio>;
	237	+ };
	238	+#endif
	239	+ panel: panel {
	240	+ compatible = "simple-panel";
	241	+ backlight = <&backlight>;
	242	+ power-supply = <&vcc3v3_lcd0_n>;
	243	+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
	244	+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
	245	+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	246	+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	247	+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
	248	+ bpc = <8>;
	249	+ prepare-delay-ms = <200>;
	250	+ enable-delay-ms = <20>;
	251	+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
	252	+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
	253	+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
	254	+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
	255	+ nodka-lvds = <15>;
	256	+
	257	+ display-timings {
	258	+ native-mode = <&timing>;
	259	+ timing: timing {
	260	+ clock-frequency = <72500000>;
	261	+ hactive = <1280>;
	262	+ vactive = <800>;
	263	+ hfront-porch = <70>;
	264	+ hsync-len = <2>;
	265	+ hback-porch = <88>;
	266	+ vfront-porch = <7>;
	267	+ vsync-len = <4>;
	268	+ vback-porch = <17>;
	269	+ hsync-active = <21>;
	270	+ vsync-active = <0>;
	271	+ de-active = <0>;
	272	+ pixelclk-active = <0>;
	273	+ };
	274	+ };
	275	+ ports {
	276	+ panel_in_lvds: endpoint {
	277	+ remote-endpoint = <&lvds_out>;
	278	+ };
	279	+ };
	280	+ };
189	281	};
190	282
191	283	&combphy0_us {
..	..	@@ -248,6 +340,10 @@
248	340	* video_phy0 needs to be enabled
249	341	* when dsi0 is enabled
250	342	*/
	343	+&video_phy0 {
	344	+ status = "disabled";
	345	+};
	346	+
251	347	&dsi0 {
252	348	status = "disabled";
253	349	};
..	..	@@ -268,6 +364,10 @@
268	364	* video_phy1 needs to be enabled
269	365	* when dsi1 is enabled
270	366	*/
	367	+
	368	+&video_phy1 {
	369	+ status = "disabled";
	370	+};
271	371	&dsi1 {
272	372	status = "disabled";
273	373	};
..	..	@@ -281,31 +381,117 @@
281	381	};
282	382
283	383	&dsi1_panel {
284		- power-supply = <&vcc3v3_lcd1_n>;
	384	+// power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
	385	+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
	386	+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
	387	+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	388	+ pinctrl-names = "default";
	389	+ pinctrl-0 = <&lcd1_rst_gpio>;
285	390	};
286	391
	392	+&route_dsi1 {
	393	+ status = "disabled";
	394	+ connect = <&vp1_out_dsi1>;
	395	+};
	396	+
	397	+
	398	+/*
	399	+* edp_start
	400	+*/
	401	+
287	402	&edp {
288		- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
289		- status = "okay";
	403	+ force-hpd;
	404	+ status = "disabled";
290	405	};
291	406
292	407	&edp_phy {
293		- status = "okay";
	408	+ status = "disabled";
294	409	};
295	410
296	411	&edp_in_vp0 {
297		- status = "okay";
	412	+ status = "disabled";
298	413	};
299	414
300	415	&edp_in_vp1 {
	416	+ status = "disabled";
	417	+
	418	+};
	419	+
	420	+&route_edp {
	421	+ status = "disabled";
	422	+ connect = <&vp1_out_edp>;
	423	+};
	424	+
	425	+&route_edp {
301	426	status = "disabled";
302	427	};
	428	+
	429	+&lvds {
	430	+ status = "disabled";
	431	+ ports {
	432	+ port@1 {
	433	+ reg = <1>;
	434	+ lvds_out:endpoint {
	435	+ remote-endpoint = <&panel_in_lvds>;
	436	+ };
	437	+ };
	438	+ };
	439	+};
	440	+
	441	+&route_lvds{
	442	+ status = "okay";
	443	+ connect = <&vp1_out_lvds>;
	444	+};
	445	+
	446	+&lvds_in_vp1 {
	447	+ status = "disabled";
	448	+};
	449	+
	450	+/*
	451	+* edp_end
	452	+*/
	453	+
	454	+/*
	455	+* Hdmi_start
	456	+*/
	457	+
	458	+&hdmi {
	459	+ status = "okay";
	460	+ rockchip,phy-table =
	461	+ <92812500 0x8009 0x0000 0x0270>,
	462	+ <165000000 0x800b 0x0000 0x026d>,
	463	+ <185625000 0x800b 0x0000 0x01ed>,
	464	+ <297000000 0x800b 0x0000 0x01ad>,
	465	+ <594000000 0x8029 0x0000 0x0088>,
	466	+ <000000000 0x0000 0x0000 0x0000>;
	467	+};
	468	+
	469	+&route_hdmi {
	470	+ status = "okay";
	471	+ connect = <&vp0_out_hdmi>;
	472	+};
	473	+
	474	+&hdmi_in_vp0 {
	475	+ status = "okay";
	476	+};
	477	+
	478	+&hdmi_in_vp1 {
	479	+ status = "disabled";
	480	+};
	481	+
	482	+&hdmi_sound {
	483	+ status = "okay";
	484	+};
	485	+
	486	+/*
	487	+ * Hdmi_END
	488	+*/
303	489
304	490	&gmac0 {
305	491	phy-mode = "rgmii";
306	492	clock_in_out = "output";
307	493
308		- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
	494	+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
309	495	snps,reset-active-low;
310	496	/* Reset time is 20ms, 100ms for rtl8211f */
311	497	snps,reset-delays-us = <0 20000 100000>;
..	..	@@ -325,7 +511,9 @@
325	511	rx_delay = <0x2f>;
326	512
327	513	phy-handle = <&rgmii_phy0>;
	514	+
328	515	status = "disabled";
	516	+
329	517	};
330	518
331	519	&gmac1 {
..	..	@@ -359,8 +547,22 @@
359	547	* power-supply should switche to vcc3v3_lcd1_n
360	548	* when mipi panel is connected to dsi1.
361	549	*/
362		-&gt1x {
363		- power-supply = <&vcc3v3_lcd0_n>;
	550	+
	551	+
	552	+&i2c3 {
	553	+ status = "okay";
	554	+ //mac eeprom
	555	+ eeprom@51 {
	556	+ //compatible = "atmel,24c02";
	557	+ compatible = "atmel,24c256";
	558	+ reg = <0x51>;
	559	+ };
	560	+
	561	+ //nk-mcu
	562	+ nkmcu@15 {
	563	+ compatible = "nk_mcu";
	564	+ reg = <0x15>;
	565	+ };
364	566	};
365	567
366	568	&i2c4 {
..	..	@@ -376,7 +578,6 @@
376	578	reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
377	579	pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
378	580	rockchip,grf = <&grf>;
379		- power-domains = <&power RK3568_PD_VI>;
380	581	rockchip,camera-module-index = <0>;
381	582	rockchip,camera-module-facing = "back";
382	583	rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..	..	@@ -433,6 +634,19 @@
433	634	};
434	635	};
435	636
	637	+&i2c5 {
	638	+ status = "okay";
	639	+
	640	+ hym8563: hym8563@51 {
	641	+ compatible = "haoyu,hym8563";
	642	+ reg = <0x51>;
	643	+ #clock-cells = <0>;
	644	+ clock-frequency = <32768>;
	645	+ clock-output-names = "xin32k";
	646	+ /* rtc_int is not connected */
	647	+ };
	648	+};
	649	+
436	650	&mdio0 {
437	651	rgmii_phy0: phy@0 {
438	652	compatible = "ethernet-phy-ieee802.3-c22";
..	..	@@ -447,50 +661,51 @@
447	661	};
448	662	};
449	663
450		-&video_phy0 {
451		- status = "disabled";
452		-};
453	664
454		-&video_phy1 {
455		- status = "disabled";
456		-};
457	665
458	666	&pcie30phy {
459		- status = "okay";
	667	+ status = "disabled";
460	668	};
461	669
462		-&pcie3x2 {
463		- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
	670	+&pcie2x1 {
	671	+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
464	672	vpcie3v3-supply = <&vcc3v3_pcie>;
465	673	status = "okay";
466	674	};
467	675
468	676	&pinctrl {
469		- cam {
470		- camera_pwr: camera-pwr {
471		- rockchip,pins =
472		- /* camera power en */
473		- <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
474		- };
475		- };
	677	+// cam {
	678	+// camera_pwr: camera-pwr {
	679	+// rockchip,pins =
	680	+// /* camera power en */
	681	+// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
	682	+// };
	683	+// };
476	684	headphone {
477	685	hp_det: hp-det {
478		- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
	686	+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
	687	+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
479	688	};
480	689	};
481	690
482	691	wireless-wlan {
483	692	wifi_host_wake_irq: wifi-host-wake-irq {
484		- rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
	693	+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
485	694	};
486	695	};
487	696
488	697	wireless-bluetooth {
489		- uart8_gpios: uart8-gpios {
490		- rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
	698	+ uart1_gpios: uart1-gpios {
	699	+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
491	700	};
492	701	};
493	702
	703	+ lcd1 {
	704	+ lcd1_rst_gpio: lcd1-rst-gpio {
	705	+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
	706	+ };
	707	+ };
	708	+
494	709	nk_io_init{
495	710	nk_io_gpio: nk-io-gpio{
496	711	rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..	..	@@ -500,7 +715,7 @@
500	715	<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
501	716	<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
502	717	<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
503		- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
	718	+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
504	719	<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
505	720	<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
506	721	<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..	..	@@ -508,18 +723,29 @@
508	723	<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
509	724	<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
510	725	<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
	726	+ <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
	727	+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
	728	+ <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
511	729	<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
512		- <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
513		- <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
514		- <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
515		- <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
516		- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
	730	+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B0_u_3V3 DO1 8
	731	+ <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B3_u_3V3 DO2 11
	732	+ <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B4_u_3V3 DO3 12
	733	+ <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B5_u_3V3 DO4 13
	734	+ <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B6_u_3V3 DO5 14
	735	+
	736	+ <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C0_d_3V3 DI1 16
	737	+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C1_d_3V3 DI2 17
	738	+ <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C2_d_3V3 DI3 18
	739	+ <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C3_d_3V3 DI4 19
	740	+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C5_d_3V3 DI5 21
	741	+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
	742	+ <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, //sig_led
	743	+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, //err_led
	744	+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, //run_led
	745	+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; //HOST3_EN_GPIO4_B2_1V8
	746	+
517	747	};
518	748	};
519		-};
520		-
521		-&rk809_sound {
522		- hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
523	749	};
524	750
525	751	&rkisp {
..	..	@@ -531,7 +757,7 @@
531	757	};
532	758
533	759	&rkisp_vir0 {
534		- status = "okay";
	760	+ status = "disabled";
535	761
536	762	port {
537	763	#address-cells = <1>;
..	..	@@ -544,34 +770,30 @@
544	770	};
545	771	};
546	772
547		-&route_dsi0 {
548		- status = "disabled";
549		- connect = <&vp1_out_dsi0>;
550		-};
551	773
552		-&route_edp {
553		- status = "okay";
554		- connect = <&vp0_out_edp>;
555		-};
556	774
557	775	&sata2 {
558	776	status = "okay";
559	777	};
560	778
561	779	&sdmmc2 {
562		- max-frequency = <150000000>;
563		- supports-sdio;
564		- bus-width = <4>;
565		- disable-wp;
566		- cap-sd-highspeed;
567		- cap-sdio-irq;
568		- keep-power-in-suspend;
569		- mmc-pwrseq = <&sdio_pwrseq>;
570		- non-removable;
571		- pinctrl-names = "default";
572		- pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
573		- sd-uhs-sdr104;
574		- status = "okay";
	780	+ status = "disabled";
	781	+};
	782	+
	783	+&sdmmc1 {
	784	+ max-frequency = <150000000>;
	785	+ supports-sdio;
	786	+ bus-width = <4>;
	787	+ disable-wp;
	788	+ cap-sd-highspeed;
	789	+ cap-sdio-irq;
	790	+ keep-power-in-suspend;
	791	+ mmc-pwrseq = <&sdio_pwrseq>;
	792	+ non-removable;
	793	+ pinctrl-names = "default";
	794	+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
	795	+ sd-uhs-sdr104;
	796	+ status = "okay";
575	797	};
576	798
577	799	&spdif_8ch {
..	..	@@ -581,25 +803,16 @@
581	803	};
582	804
583	805	&uart8 {
584		- status = "okay";
	806	+ status = "disabled";
585	807	pinctrl-names = "default";
586	808	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
587	809	};
588	810
589		-&vcc3v3_lcd0_n {
590		- gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
591		- enable-active-high;
592		-};
593		-
594		-&vcc3v3_lcd1_n {
595		- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
596		- enable-active-high;
597		-};
598	811
599	812	&wireless_wlan {
600	813	pinctrl-names = "default";
601	814	pinctrl-0 = <&wifi_host_wake_irq>;
602		- WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
	815	+ WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
603	816	};
604	817
605	818	&wireless_bluetooth {
..	..	@@ -607,12 +820,53 @@
607	820	clocks = <&rk809 1>;
608	821	clock-names = "ext_clock";
609	822	//wifi-bt-power-toggle;
610		- uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
	823	+ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
611	824	pinctrl-names = "default", "rts_gpio";
612		- pinctrl-0 = <&uart8m0_rtsn>;
613		- pinctrl-1 = <&uart8_gpios>;
614		- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
615		- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
616		- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
	825	+ pinctrl-0 = <&uart1m0_rtsn>;
	826	+ pinctrl-1 = <&uart1_gpios>;
	827	+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
	828	+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
	829	+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
	830	+ status = "disabled";
	831	+};
	832	+
	833	+&uart0 {
	834	+ status = "disabled";
	835	+};
	836	+
	837	+&uart1 {
	838	+ pinctrl-names = "default";
	839	+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
	840	+ status = "disabled";
	841	+};
	842	+
	843	+&uart3 {
617	844	status = "okay";
	845	+ pinctrl-0 = <&uart3m1_xfer>;
	846	+};
	847	+
	848	+&uart4 {
	849	+ status = "disabled";
	850	+ pinctrl-0 = <&uart4m1_xfer>;
	851	+};
	852	+
	853	+&uart5 {
	854	+ status = "okay";
	855	+ pinctrl-0 = <&uart5m1_xfer>;
	856	+};
	857	+
	858	+
	859	+&uart7 {
	860	+ status = "okay";
	861	+ pinctrl-0 = <&uart7m1_xfer>;
	862	+};
	863	+
	864	+&uart8 {
	865	+ status = "disabled";
	866	+ pinctrl-0 = <&uart8m1_xfer>;
	867	+};
	868	+
	869	+&uart9 {
	870	+ status = "disabled";
	871	+ pinctrl-0 = <&uart9m1_xfer>;
618	872	};