~hc/RK356X_SDK_RELEASE.git

..	..	@@ -8,6 +8,7 @@
8	8
9	9	#include <dt-bindings/gpio/gpio.h>
10	10	#include <dt-bindings/pinctrl/rockchip.h>
	11	+#include <dt-bindings/display/media-bus-format.h>
11	12	#include "rk3568.dtsi"
12	13	#include "rk3568-evb.dtsi"
13	14
..	..	@@ -18,6 +19,7 @@
18	19	rk_headset: rk-headset {
19	20	compatible = "rockchip_headset";
20	21	headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
	22	+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
21	23	pinctrl-names = "default";
22	24	pinctrl-0 = <&hp_det>;
23	25	};
..	..	@@ -58,7 +60,9 @@
58	60	regulator-name = "vcc3v3_pcie";
59	61	regulator-min-microvolt = <3300000>;
60	62	regulator-max-microvolt = <3300000>;
	63	+ regulator-always-on;
61	64	enable-active-high;
	65	+ regulator-boot-on;
62	66	gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
63	67	startup-delay-us = <5000>;
64	68	vin-supply = <&dc_12v>;
..	..	@@ -86,15 +90,138 @@
86	90	};
87	91	#endif
88	92
	93	+#if 0
	94	+ leds: leds {
	95	+ compatible = "gpio-leds";
	96	+ sig_led: sig_led {
	97	+ gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
	98	+ default-state = "on";
	99	+ };
	100	+ };
	101	+
	102	+ leds: leds {
	103	+ compatible = "gpio-leds";
	104	+ err_led: err_led {
	105	+ gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
	106	+ default-state = "on";
	107	+ };
	108	+ };
	109	+#endif
	110	+
	111	+ ndj_io_init {
	112	+ compatible = "nk_io_control";
	113	+ pinctrl-names = "default";
	114	+ pinctrl-0 = <&nk_io_gpio>;
	115	+
	116	+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
	117	+
	118	+ vcc_5v {
	119	+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	120	+ gpio_function = <0>;
	121	+ };
	122	+
	123	+ vcc_12v {
	124	+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
	125	+ gpio_function = <0>;
	126	+ };
	127	+
	128	+ vcc_3.3v {
	129	+ gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
	130	+ gpio_function = <0>;
	131	+ };
	132	+
	133	+ ax88772_rst {
	134	+ gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; //AX88772_RST_GPIO3_B5_3V3
	135	+ gpio_function = <3>;
	136	+ };
	137	+
	138	+ ax88631_rst {
	139	+ gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; //AX88772_RST_GPIO3_B6_3V3
	140	+ gpio_function = <3>;
	141	+ };
	142	+/*
	143	+ hub_host3 {
	144	+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
	145	+ gpio_function = <0>;
	146	+ };
	147	+*/
	148	+ wake_4g {
	149	+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
	150	+ gpio_function = <0>;
	151	+ };
	152	+
	153	+ air_mode_4g {
	154	+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
	155	+ gpio_function = <0>;
	156	+ };
	157	+
	158	+ reset_4g {
	159	+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
	160	+ gpio_function = <3>;
	161	+ };
	162	+
	163	+ en_4g {
	164	+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
	165	+ gpio_function = <0>;
	166	+ };
	167	+
	168	+ //gpio99 {
	169	+ // gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
	170	+ // gpio_function = <1>;
	171	+ //};
	172	+
	173	+ wifi_power_en {
	174	+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
	175	+ gpio_function = <0>;
	176	+ };
	177	+ #if 0
	178	+ do1 {
	179	+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
	180	+ gpio_function = <0>;
	181	+ };
	182	+
	183	+ do2 {
	184	+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
	185	+ gpio_function = <0>;
	186	+ };
	187	+
	188	+ do3 {
	189	+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
	190	+ gpio_function = <0>;
	191	+ };
	192	+
	193	+ do4 {
	194	+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
	195	+ gpio_function = <0>;
	196	+ };
	197	+
	198	+ do5 {
	199	+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
	200	+ gpio_function = <0>;
	201	+ };
	202	+
	203	+ do6 {
	204	+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
	205	+ gpio_function = <0>;
	206	+ };
	207	+
	208	+ do7 {
	209	+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
	210	+ gpio_function = <0>;
	211	+ };
	212	+
	213	+ di1 {
	214	+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
	215	+ gpio_function = <1>;
	216	+ };
	217	+ #endif
	218	+ };
	219	+#if 0
89	220	nk_io_init {
90	221	compatible = "nk_io_control";
91		-// usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
92		- lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
93		- lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
94		- vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
	222	+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
95	223	hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
96	224	hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
97		-// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
98	225	vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
99	226	vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
100	227	en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
..	..	@@ -102,23 +229,55 @@
102	229	air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
103	230	wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
104	231	hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
105		- spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
106		-
107		- edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
108		- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
109		- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
110		- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
111		- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
112		- edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
113		-// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
114		-// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
115		-
	232	+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
116	233	wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
117		-
	234	+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
118	235	pinctrl-names = "default";
119		- pinctrl-0 = <&nk_io_gpio>;
120		- nodka_lvds = <9>;
	236	+ pinctrl-0 = <&nk_io_gpio>;
121	237	};
	238	+#endif
	239	+ panel: panel {
	240	+ compatible = "simple-panel";
	241	+ backlight = <&backlight>;
	242	+ power-supply = <&vcc3v3_lcd0_n>;
	243	+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
	244	+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
	245	+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	246	+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	247	+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
	248	+ bpc = <8>;
	249	+ prepare-delay-ms = <200>;
	250	+ enable-delay-ms = <20>;
	251	+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
	252	+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
	253	+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
	254	+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
	255	+ nodka-lvds = <15>;
	256	+
	257	+ display-timings {
	258	+ native-mode = <&timing>;
	259	+ timing: timing {
	260	+ clock-frequency = <72500000>;
	261	+ hactive = <1280>;
	262	+ vactive = <800>;
	263	+ hfront-porch = <70>;
	264	+ hsync-len = <2>;
	265	+ hback-porch = <88>;
	266	+ vfront-porch = <7>;
	267	+ vsync-len = <4>;
	268	+ vback-porch = <17>;
	269	+ hsync-active = <21>;
	270	+ vsync-active = <0>;
	271	+ de-active = <0>;
	272	+ pixelclk-active = <0>;
	273	+ };
	274	+ };
	275	+ ports {
	276	+ panel_in_lvds: endpoint {
	277	+ remote-endpoint = <&lvds_out>;
	278	+ };
	279	+ };
	280	+ };
122	281	};
123	282
124	283	&combphy0_us {
..	..	@@ -134,11 +293,11 @@
134	293	};
135	294
136	295	&csi2_dphy_hw {
137		- status = "okay";
	296	+ status = "disabled";
138	297	};
139	298
140	299	&csi2_dphy0 {
141		- status = "okay";
	300	+ status = "disabled";
142	301
143	302	ports {
144	303	#address-cells = <1>;
..	..	@@ -181,8 +340,12 @@
181	340	* video_phy0 needs to be enabled
182	341	* when dsi0 is enabled
183	342	*/
	343	+&video_phy0 {
	344	+ status = "disabled";
	345	+};
	346	+
184	347	&dsi0 {
185		- status = "okay";
	348	+ status = "disabled";
186	349	};
187	350
188	351	&dsi0_in_vp0 {
..	..	@@ -190,7 +353,7 @@
190	353	};
191	354
192	355	&dsi0_in_vp1 {
193		- status = "okay";
	356	+ status = "disabled";
194	357	};
195	358
196	359	&dsi0_panel {
..	..	@@ -201,6 +364,10 @@
201	364	* video_phy1 needs to be enabled
202	365	* when dsi1 is enabled
203	366	*/
	367	+
	368	+&video_phy1 {
	369	+ status = "disabled";
	370	+};
204	371	&dsi1 {
205	372	status = "disabled";
206	373	};
..	..	@@ -214,31 +381,117 @@
214	381	};
215	382
216	383	&dsi1_panel {
217		- power-supply = <&vcc3v3_lcd1_n>;
	384	+// power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
	385	+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
	386	+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
	387	+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	388	+ pinctrl-names = "default";
	389	+ pinctrl-0 = <&lcd1_rst_gpio>;
218	390	};
219	391
	392	+&route_dsi1 {
	393	+ status = "disabled";
	394	+ connect = <&vp1_out_dsi1>;
	395	+};
	396	+
	397	+
	398	+/*
	399	+* edp_start
	400	+*/
	401	+
220	402	&edp {
221		- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
222		- status = "okay";
	403	+ force-hpd;
	404	+ status = "disabled";
223	405	};
224	406
225	407	&edp_phy {
226		- status = "okay";
	408	+ status = "disabled";
227	409	};
228	410
229	411	&edp_in_vp0 {
230		- status = "okay";
	412	+ status = "disabled";
231	413	};
232	414
233	415	&edp_in_vp1 {
	416	+ status = "disabled";
	417	+
	418	+};
	419	+
	420	+&route_edp {
	421	+ status = "disabled";
	422	+ connect = <&vp1_out_edp>;
	423	+};
	424	+
	425	+&route_edp {
234	426	status = "disabled";
235	427	};
	428	+
	429	+&lvds {
	430	+ status = "disabled";
	431	+ ports {
	432	+ port@1 {
	433	+ reg = <1>;
	434	+ lvds_out:endpoint {
	435	+ remote-endpoint = <&panel_in_lvds>;
	436	+ };
	437	+ };
	438	+ };
	439	+};
	440	+
	441	+&route_lvds{
	442	+ status = "okay";
	443	+ connect = <&vp1_out_lvds>;
	444	+};
	445	+
	446	+&lvds_in_vp1 {
	447	+ status = "disabled";
	448	+};
	449	+
	450	+/*
	451	+* edp_end
	452	+*/
	453	+
	454	+/*
	455	+* Hdmi_start
	456	+*/
	457	+
	458	+&hdmi {
	459	+ status = "okay";
	460	+ rockchip,phy-table =
	461	+ <92812500 0x8009 0x0000 0x0270>,
	462	+ <165000000 0x800b 0x0000 0x026d>,
	463	+ <185625000 0x800b 0x0000 0x01ed>,
	464	+ <297000000 0x800b 0x0000 0x01ad>,
	465	+ <594000000 0x8029 0x0000 0x0088>,
	466	+ <000000000 0x0000 0x0000 0x0000>;
	467	+};
	468	+
	469	+&route_hdmi {
	470	+ status = "okay";
	471	+ connect = <&vp0_out_hdmi>;
	472	+};
	473	+
	474	+&hdmi_in_vp0 {
	475	+ status = "okay";
	476	+};
	477	+
	478	+&hdmi_in_vp1 {
	479	+ status = "disabled";
	480	+};
	481	+
	482	+&hdmi_sound {
	483	+ status = "okay";
	484	+};
	485	+
	486	+/*
	487	+ * Hdmi_END
	488	+*/
236	489
237	490	&gmac0 {
238	491	phy-mode = "rgmii";
239	492	clock_in_out = "output";
240	493
241		- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
	494	+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
242	495	snps,reset-active-low;
243	496	/* Reset time is 20ms, 100ms for rtl8211f */
244	497	snps,reset-delays-us = <0 20000 100000>;
..	..	@@ -258,7 +511,9 @@
258	511	rx_delay = <0x2f>;
259	512
260	513	phy-handle = <&rgmii_phy0>;
	514	+
261	515	status = "disabled";
	516	+
262	517	};
263	518
264	519	&gmac1 {
..	..	@@ -292,9 +547,7 @@
292	547	* power-supply should switche to vcc3v3_lcd1_n
293	548	* when mipi panel is connected to dsi1.
294	549	*/
295		-&gt1x {
296		- power-supply = <&vcc3v3_lcd0_n>;
297		-};
	550	+
298	551
299	552	&i2c3 {
300	553	status = "okay";
..	..	@@ -313,7 +566,7 @@
313	566	};
314	567
315	568	&i2c4 {
316		- status = "okay";
	569	+ status = "disabled";
317	570	gc8034: gc8034@37 {
318	571	compatible = "galaxycore,gc8034";
319	572	status = "okay";
..	..	@@ -325,7 +578,6 @@
325	578	reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
326	579	pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
327	580	rockchip,grf = <&grf>;
328		- power-domains = <&power RK3568_PD_VI>;
329	581	rockchip,camera-module-index = <0>;
330	582	rockchip,camera-module-facing = "back";
331	583	rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..	..	@@ -359,7 +611,7 @@
359	611	};
360	612	};
361	613	ov5695: ov5695@36 {
362		- status = "okay";
	614	+ status = "disabled";
363	615	compatible = "ovti,ov5695";
364	616	reg = <0x36>;
365	617	clocks = <&cru CLK_CIF_OUT>;
..	..	@@ -409,20 +661,14 @@
409	661	};
410	662	};
411	663
412		-&video_phy0 {
413		- status = "okay";
414		-};
415	664
416		-&video_phy1 {
	665	+
	666	+&pcie30phy {
417	667	status = "disabled";
418	668	};
419	669
420		-&pcie30phy {
421		- status = "okay";
422		-};
423		-
424		-&pcie3x2 {
425		- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
	670	+&pcie2x1 {
	671	+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
426	672	vpcie3v3-supply = <&vcc3v3_pcie>;
427	673	status = "okay";
428	674	};
..	..	@@ -437,7 +683,8 @@
437	683	// };
438	684	headphone {
439	685	hp_det: hp-det {
440		- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
	686	+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
	687	+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
441	688	};
442	689	};
443	690
..	..	@@ -452,6 +699,13 @@
452	699	rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
453	700	};
454	701	};
	702	+
	703	+ lcd1 {
	704	+ lcd1_rst_gpio: lcd1-rst-gpio {
	705	+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
	706	+ };
	707	+ };
	708	+
455	709	nk_io_init{
456	710	nk_io_gpio: nk-io-gpio{
457	711	rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..	..	@@ -465,27 +719,45 @@
465	719	<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
466	720	<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
467	721	<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
468		- <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
469	722	<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
470	723	<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
471	724	<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
472	725	<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
	726	+ <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
	727	+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
	728	+ <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
473	729	<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
474		- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
	730	+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B0_u_3V3 DO1 8
	731	+ <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B3_u_3V3 DO2 11
	732	+ <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B4_u_3V3 DO3 12
	733	+ <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B5_u_3V3 DO4 13
	734	+ <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B6_u_3V3 DO5 14
	735	+
	736	+ <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C0_d_3V3 DI1 16
	737	+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C1_d_3V3 DI2 17
	738	+ <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C2_d_3V3 DI3 18
	739	+ <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C3_d_3V3 DI4 19
	740	+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C5_d_3V3 DI5 21
	741	+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
	742	+ <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, //sig_led
	743	+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, //err_led
	744	+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, //run_led
	745	+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; //HOST3_EN_GPIO4_B2_1V8
	746	+
475	747	};
476	748	};
477	749	};
478	750
479	751	&rkisp {
480		- status = "okay";
	752	+ status = "disabled";
481	753	};
482	754
483	755	&rkisp_mmu {
484		- status = "okay";
	756	+ status = "disabled";
485	757	};
486	758
487	759	&rkisp_vir0 {
488		- status = "okay";
	760	+ status = "disabled";
489	761
490	762	port {
491	763	#address-cells = <1>;
..	..	@@ -498,15 +770,7 @@
498	770	};
499	771	};
500	772
501		-&route_dsi0 {
502		- status = "okay";
503		- connect = <&vp1_out_dsi0>;
504		-};
505	773
506		-&route_edp {
507		- status = "okay";
508		- connect = <&vp0_out_edp>;
509		-};
510	774
511	775	&sata2 {
512	776	status = "okay";
..	..	@@ -544,15 +808,6 @@
544	808	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
545	809	};
546	810
547		-&vcc3v3_lcd0_n {
548		- gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
549		- enable-active-high;
550		-};
551		-
552		-&vcc3v3_lcd1_n {
553		- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
554		- enable-active-high;
555		-};
556	811
557	812	&wireless_wlan {
558	813	pinctrl-names = "default";
..	..	@@ -566,18 +821,23 @@
566	821	clock-names = "ext_clock";
567	822	//wifi-bt-power-toggle;
568	823	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
569		- BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
570	824	pinctrl-names = "default", "rts_gpio";
571	825	pinctrl-0 = <&uart1m0_rtsn>;
572	826	pinctrl-1 = <&uart1_gpios>;
573		- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
574		- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
575		- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
	827	+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
	828	+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
	829	+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
576	830	status = "disabled";
577	831	};
578	832
579	833	&uart0 {
580		- status = "okay";
	834	+ status = "disabled";
	835	+};
	836	+
	837	+&uart1 {
	838	+ pinctrl-names = "default";
	839	+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
	840	+ status = "disabled";
581	841	};
582	842
583	843	&uart3 {
..	..	@@ -586,7 +846,7 @@
586	846	};
587	847
588	848	&uart4 {
589		- status = "okay";
	849	+ status = "disabled";
590	850	pinctrl-0 = <&uart4m1_xfer>;
591	851	};
592	852
..	..	@@ -595,12 +855,18 @@
595	855	pinctrl-0 = <&uart5m1_xfer>;
596	856	};
597	857
	858	+
598	859	&uart7 {
599	860	status = "okay";
600	861	pinctrl-0 = <&uart7m1_xfer>;
601	862	};
602	863
	864	+&uart8 {
	865	+ status = "disabled";
	866	+ pinctrl-0 = <&uart8m1_xfer>;
	867	+};
	868	+
603	869	&uart9 {
604		- status = "okay";
	870	+ status = "disabled";
605	871	pinctrl-0 = <&uart9m1_xfer>;
606	872	};